Transcript Keeping Up with Moore’s Law

Keeping Up with
Moore’s Law
Who the heck is this Moore
guy anyway?
Gordon E. Moore
was the cofounder
of Intel Corporation
 Earned a B.S. in
Chemistry from the
University of
California at
Berkeley and a
Ph.D. in Chemistry
and Physics

And his law?
Moore’s Law states that every 18
months, the number of devices on a
microchip (and hence the potential
power of a computer) that can be
squeezed on to a single chip is doubled
 This was proposed in 1965 and still
holds true today!!!!
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Integrated Circuits
Three basic components of integrated
circuits are transistors and DRAM
(dynamic random access memory) and
interconnects
 The industry is trying to simultaneously
scale down these components so more
can be fit onto a chip

Transistors: Doping silicon (it’s
not what you think)
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Doping is adding atoms
to a material to change
its electronic properties
N-type silicon
(phosphorous doped)
contains free electrons
P-type silicon (boron
doped) contains free
“holes”
What’s a Transistor?
Transistors are
composed of n-type and
p-type silicon
 Made up of a source,
gate, and drain
 The distance between
the source and the
drain is called the
feature size.
 Insulator (gate
dielectric) placed
between gate and ptype silicon.
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Problems with reducing transistor
size
In scaling, the thickness of the gate
dielectric must decrease as the gate
length decreases (feature size).
 Currently gates sizes are around 2nm
and are projected to decrease to
0.5nm. (~2 atomic layers)
 Tunneling induced leakage becomes a
problem.

Solutions?
Thicker high dielectric insulators
 Reinvent the transistor:
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Single-electron transistor (SET) (basis for
quantum computers)
 Use carbon nanotubes to conduct the
charge
 Organic compounds

What’s DRAM?
Essentially a capacitor that stores
charge
 When charge is present, the binary
representation is 1 (the charge often
leaks from the capacitor necessitating a
periodic refresh)
 When charge is not present, the binary
representation is 0

And how can we make it
smaller than ~22μm2?
By reducing the area of the capacitor, of
course!
 Since the charge remains constant, the
thickness of the silicon dioxide dielectric must
be reduced (bc capaticence is proportional to
the dielectric area but inversely proportional
to the thickness)
 The thickness has become so small that
quantum tunneling causes the charge to leak
faster than DRAM refresh rates

Solutions?
Find an insulator with a higher dielectric
constant
 Change the device geometry, structure,
and process

Interconnects
Links components of the integrated
circuit
 Uses 70% of the chip’s area
 Copper wiring is mainly used (but it can
only be scaled down so far)
 Will limit processing speed even if
reductions in transistor size occur

Developing technologies for
faster interconnects
Wireless interconnects (radio-frequency
signals)
 Optical interconnects
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Use high vertical cavity-surface-emitting
lasers (VCSELs) to generate light and build
waveguides on the chip
 Use light from external sources and use
reflectors to direct them

Chip making
With the reduction of the size of IC
components, resolution in making them must
increase
 Limitations in lithography (method used to
make chips) are economic (don’t know how
to print smaller components cost-effectively)
 Research is primarily concerned with high
volume production of these nano components

How the darn thing works
(pattern lithography)
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The wafer is first covered by
a photoresist
The light that passes
throught the photomask
changes chemical structure
of the photoresist and that
part can be washed away
The resulting pattern is then
exposed to doping,
deposition, or etching.
The rest of the photoresist is
then removed after a
permanent change in the
wafer is made.
Types of lithography
Optical
 Electron beam
 Proximity X-ray
 Extreme ultraviolet
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So…who’s tired of me talking?
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Well, it’s almost over.
To sum it all up
Traditional scaling of integrated circuits
is coming to an end (materials must
change)
 Quantum physics is becoming more
significant in the quest for more
computing power

The International Technological
Roadmap for Semiconductors (ITRS)
Developed by the Semiconductor Industry
Association in ‘99, it outlines the advances of
the industry til ’14
 To give you an idea by then feature lengths
will be ~20nm, gate thicknesses will be
~0.5nm, and roughly 4 electrons would be
required to switch on or off a transistor (as
opposed to ~1000 electrons today)
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So, Moore’s Law is going to
always hold, right?
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Wrong
Since computing is a physical system, it must abide
by limits set by the laws of physics
Seth Lloyd of MIT actually computed the physical
limits of computing using quantum mechanics
(however, we won’t be able to approach these limits
because his calculations are based on very simplistic
“perfect” computers)
But they are beyond my comprehension so I cannot
explain them to you
And they are probably beyond your comprehension
as well
And you are probably thinking when will this
presentation end
The End
References
Peercy, Paul S. “The Drive to
Miniaturization.” Nature. Aug 2000: 10231026.
 Pescovitz, David. “Wired for Speed.”
Scientific American. May 2000: 41-42.
 Mullins, Justin. “Integrated Circuits.” New
Scientist. Dec 2000: insert 1-4.
 Ito, Takashi and Okazaki, Shinji. “Pushing
the Limits of Lithography.” Nature. Aug
2000: 1027-1031.
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