Transcript Slide 1
Design and Implementation of VLSI Systems
(EN1600)
Lecture08
Prof. Sherief Reda
Division of Engineering, Brown University
Spring 2008
[sources: Weste/Addison Wesley – Rabaey/Pearson]
Summary of Shockley model
polysilicon
gate
W
tox
n+
L
n+
SiO2 gate oxide
(good insulator, ox = 3.9)
p-type body
0
V
I ds Vgs Vt ds
2
2
V
V
gs
t
2
for nMOS
Vgs Vt
cutoff
V V V
ds
ds
dsat
Vds Vdsat
linear
saturation
for pMOS
Ideal vs. non-ideal
ideal
Non-ideal
Saturation current does not increase quadratically with Vgs
Saturation current lightly increases with increase in Vds
Ideal vs. non-ideal
There is leakage current when the transistor is in cut off
Ids depends on the temperature
At high electric field, drift velocity rolls
of due to carrier scattering
u n (m /s )
Velocity saturation
usat= 105
Constant velocity
Constant mobility (slope = µ)
xc = 1.5
Empirically:
x
(V/µm)
Alpha model
0
V
I ds I dsat ds
Vdsat
I dsat
Vgs Vt
cutoff
Vds Vdsat
linear
Vds Vdsat
saturation
I dsat Pc
V
2
gs
Vt
Vdsat Pv Vgs Vt
/2
Pc, Pv and alpha are found by fitting the model to the empirical
modeling results
Channel length modulation
GND
Source
• The reverse-bias p-n junction between drain
and body forms a depletion region with a width
Ld that increases with Vdb
• Increasing Vds
increases depletion width
decreases effective channel length
increases current
Channel length
modulation factor
(empirical factor)
VDD
Gate
VDD
Drain
Depletion Region
Width: Ld
n+
L
Leff
n+
p GND
bulk Si
Leakage current: subthreshold
Tunnel current
polysilicon
gate
W
t ox
L
n+
n+
p-type body
Subthreshold conduction
Junction leakage
Subthreshold leakage is
the biggest source in
modern transistors
Vgs Vt
I ds I ds 0e
nvT
I ds0 vT2e1.8
Vds
v
1 e T
n = 1.4-15
180nm process
Leakage current: junction leakage and
tunneling
Junction leakage: reverse-biased p-n junctions have
VvD
T
some leakage.
I D I S e 1
Is depends on doping levels and area and perimeter
of diffusion regions
p+
n+
n+
p+
p+
n+
n well
p substrate
109
106
0.6 nm
0.8 nm
2
JG (A/cm )
Tunneling leakage:
Carriers may tunnel thorough very thin gate oxides
Negligible for older processes
(and future processes with high-k dielectrics!)
tox
VD D trend
103
1.0 nm
1.2 nm
100
1.5 nm
1.9 nm
10-3
10-6
10-9
0
0.3
0.6
0.9
VD D
1.2
1.5
1.8
Impact of temperature
• Increases in temperature increases leakage current
• Increases in temperature decreases leakage current
Body effect
Vt is sensitive to Vsb -> body effect
Vt Vt 0
s 2vT ln
tox
ox
s Vsb s
NA
ni
2q si N A
2q si N A
Cox
• What is the impact on Vt if we increase/decrease the body bias?
Process variations
Both MOSFETs have 30nm channel with 130
dopant atoms in the channel depletion region
threshold voltage 0.97V
threshold voltage 0.57V
Process variations impact gate length, threshold
voltage, and oxide thickness
Summary
Ideal transistor characteristics
Non-ideal transistor characteristics
Inverter DC transfer characteristics
Simulation with SPICE and integration with L-Edit