Transcript No Slide Title

Basic MOSFET Model
Q = channel charge
L = channel length
Channel Current = Rate of Flow of Charge
v = carrier velocity
Ids = Q/τsd
µ = carrier mobility
Derive transit time τsd
Eds = electric field
τsd = channel length (L) / carrier velocity (v)
Vds = drain - source voltage
v = µEds
Cg = gate - channel capac.
Eds = Vds / L
Tox = gate oxide thickness
v = µVds / L
єox = gate oxide permittivity
Thus τsd = L2/ µVds
W = channel width
Vt = threshold voltage
Channel charge: charge appears in channel when gate
voltage exceeds threshold.
 p  240cm2 / V sec(surface)
Since gate and oxide form a capacitor:
 n  650cm2 / V sec(surface)
Q = C x ( Vgc - Vt )
Q = C x ( Vgs - Vt ) source end
Q = C x ( Vgs - Vds -Vt) drain end
So, average channel charge Q = C x (Vgs -Vt - Vds/2)
Gate - channel capacitance is a parallel plate capacitor
Cg = W L єox / Tox
Hence, drain current
Ids = W L єox µVds (Vgs -Vt - Vds/2) / L2 x Tox
EE213 VLSI Design S Daniels
Basic MOSFET Model
Vds2 
W
I ds  K  (Vgs  Vt )Vds  
L
2
In the non - saturated region where Vds < Vgs - Vt
K = єox µ/Tox
= process transconductance parameter
ß = KW/L
= device transconductance parameter
Saturation begins when Vds = Vgs - Vt
I ds  K

W
(Vgs  Vt ) 2
L

In the saturated region where Vds = Vgs - Vt
These expressions are based on a very simple model. Real transistors will behave
slightly differently
These expressions hold for both enhancement mode and depletion mode devices
EE213 VLSI Design S Daniels
Threshold Voltage
1
 Tox 
Vt  Vt (0)    2 Si QN (VSB ) 2
  ox 
VSB
N
Vt(0)
= substrate bias voltage
= impurity concentration in the substrate
= the threshold voltage for VSB = 0
Increasing VSB causes the channel to be depleted of charge carriers
and thus the threshold voltage is raised
Vt   VSB
Change in Vt depends on VSB and a constant which
depends on substrate doping
EE213 VLSI Design S Daniels
Transconductance
I ds
gm 
forVds  const
Vds
Transconductance expresses the relationship
between output current Ids and input voltage Vgs
I ds 
I ds 
Qc
 ds
QcVds 
In saturation Vds = Vgs -Vt
L2
(Q  CV )
CVgs Vds
I ds 
L2
I ds CVds

Vgs
L2
An indication of frequency response can be given by:
C
 oxWL
gm 
Tox
 ox W
Tox L
(Vds V t)
g m   (Vgs  Vt )
0 
gm 
 2 (Vgs  Vt )
C
L
This shows that switching speed is proportional to gate voltage above threshold and carrier mobility.
Speed is inversely proportional to the square of the length of the channel
Both gm and Vt are important FET characteristics which need to be tightly controlled
EE213 VLSI Design S Daniels