Transcript Development of a Multi-Channel Integrated Circuit for Use in

Development of a Multi-Channel Integrated
Circuit for Use in Nuclear Physics Experiments
Where Particle Identification is Important
Michael Hall
Southern Illinois University Edwardsville
IC Design Research Laboratory
April 3, 2007
Design Team
Southern Illinois University Edwardsville:
Dr. George Engel (PI)
Michael Hall (graduate student)
Justin Proctor (graduate student)
Venkata Tirumasaletty (graduate student)
Washington University in St. Louis:
Dr. Lee Sobotka (Co-PI)
Jon Elson (electronics specialist)
Dr. Robert Charity
Western Michigan:
Dr. Mike Famiano (Co-PI)
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Research Objective
Design a custom microchip which can be used
by nuclear physicists when they perform
experiments.
In these experiments, physicists use detectors to
sense radiation.
These experiments often require that the
physicists identify the type of radiation (α
particle, γ-ray, etc) that struck the detector.
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NSF Proposal (Funded)
$200,000 grant funded from September 2006 to August
2008.
Design, simulate, and fabricate a custom integrated
circuit for particle identification suitable for use with
– CsI(Tl) (used for charge-particle discrimination)
– Liquid Scintillator (used for neutron-gamma
discrimination)
8 channel “prototype” chip
16 channel “production” chip
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Intended Applications
The chip will be used in an experiment at
the National Superconducting Cyclotron
Laboratory (NSCL) in Fall 2007 by
Washington University collaborators.
Mass production of PSD technology is
actively being sought by our government’s
Department of Homeland Security.
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Chip and Sensor Array
HiRA Detector Array at MSU
Earlier IC developed in our lab currently being used in
Physics experiments around the country
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Simulated Input Pulse for CsI(Tl) Detector
Plot of Alpha and Proton input pulses using a CsI(Tl) Detector for 100 MeV incident radiation
MAX INPUT VOLTAGE (2V)
0
Alpha
Proton
Integrator A
Integrator B
Integrator C
Input Pulses (V)
10
-1
10
-2
10
0
1000
2000
3000
4000
5000
Time (ns)
6000
7000
8000
9000
10000
Integrators
–
–
–
A
0 to 400 ns
B 1500 to 1500 ns
C
0 to 9000 ns
Integration periods at the beginning of the signal are assumed to start before the
pulse (at -5 ns).
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Need for an Integrated Circuit
Particle identification (α particle, γ-ray, etc.)
capability
Ability to support multiple (i.e. initially eight but
eventually sixteen) radiation detectors
Three separate integration regions with
independent control of charging rate in each
region which can be used for high-quality pulse
shape discrimination (PSD).
Built-in high-quality timing circuitry
Multiple (3) triggering modes
Data sparsification
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Overview of PSD System
ug h a load R]
V(t) [c urre nt thro
A
Sample
Integration
gates
B
C
Detector
Gate control
WA
DB
WB
DA
WC DC
VME
PSD
Integrator
Chip
OR
External
logic
Ca ble
C
F
D
D
E
L
A
Y
Detector (PMT or photodiode)
External discriminators
(CFDs)
External delay lines so we can
start integrations before arrival
of pulse
External control voltages
determine Delay and Width of
integration periods
Outputs A, B, C integrator
voltages and relative time, T
A BC T
Multiplexed with other chips and sent
to 4 channels of one VME Pipeline ADC
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Channel
3 on-chip subchannels for
integrators A, B, C
Delay and width of
integrators set by
externally supplied
control voltages
Timing relative to a
common stop signal
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Sub-Channel
t0
Event
t1 t2
StartInt
t4
StopInt
DUMP
INT-x
t3
t5
StartInt
Event
Dx
DUMP
Delay Generator
Delay Generator
Start
Start
Out
Control
Wx
Out
StopInt
INT-x
Control
DUMP
Where X = A, B, C
Resistor
Array
INT-x
10 pF
Input from
Detector
3
DAC
DAC Setting
Control
OPAMP
Integrator
Output
Out
AGND
SUB CHANNEL
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Pulse Shape Discrimination Plot for CsI(Tl) Detector
PSD (Pulse Shape Discrimination) Plot
600
500
Integrator B (mV)
400
300
Alpha
Proton
200
100
0
0
50
100
150
200
250
300
350
400
450
Detector:
CsI(Tl)
Integrators:
A, B
Energy Max:
100 MeV (for
2V at input of
integrator)
Energy Range:
1 – 100 MeV
Includes all
noise sources
Integrator A (mV)
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Angular PSD Plots (CsI)
Energy = 10 MeV, Perr = 0%
Energy = 1 MeV, Perr = 2.16%
Alpha
1200
Proton
2500
1000
2000
Count
Count
800
600
1500
1000
400
500
200
0
0
40
45
50
55
60
65
Energy = 100 MeV, Perr = 0%
4000
3500
3000
Count
2500
2000
1500
1000
500
0
51
52
53
54
55
Theta
50
51
52
53
54
55
56
57
58
59
60
Theta
Theta
56
57
58
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Detector: CsI(Tl)
Integrators:
A, B
Energy Max:
100 MeV
Energy Range:
1 – 100 MeV
5000 realizations
Includes all noise sources
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Current Work
Circuit design and simulations
Behavioral level simulations (VerilogA) to
verify functionality of one complete
channel including read-out electronics
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Future Work
Layout
Fabrication
– Chip should leave for fabrication in August 2007.
– Will take approximately 2 months to make.
Testing of the IC
Chip will be used in experiment at NSCL in Fall
2007
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