Eye of the Future - University of Colorado Boulder
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Transcript Eye of the Future - University of Colorado Boulder
SmartThink Remote System
Team Cyclops
Justin Bewley
Winter Jojola
Florence Manega
Paul Roberts
Denknesh Temesgen
Introduction
• SmartThink Remote System
– Designed for people with disabilities
– Aids in performing everyday tasks
• Controls television set
• Controls objects attached to SmartThink
adapters
Conceptual Design
• Infra Red transmission
– Line of sight + 10 degrees
– Learns Pre-programmed IR codes
• Incorporates an LED array attached
to a target CPU
– LEDs correspond to state of FPGA state
machine
Conceptual Design continued…
• Head mounting
– Digital compass
• Imitate head motion
– Inclinometers
• Levels; determine vertical angle of sight
Description of working system
• Motherboard
– Microcontroller
– FPGA
– Memory
• IR Transmission
– Tx / Rx
– Adapter
• Sip/Puff Switch
• Button Switch
• Software
Overview Block Diagram
Motherboard
Micro-controller
Shown below is the MC68HC11, with the clock (8MHz) and reset button
Schematics continued
Driver for the address and data (MC74HC245) latch for the data (MM74C373)
Schematics continued
Below is the schematics for the ROM and RAM
FPGA - Spartan
State Machine
IR Transmission
IR Reception
• Television Set
• Adaptor to go on
other devices, i.e.
fan
– Regulated by
120Vac.
– Processor checks
for IR codes
– Relay switches
power flow to
peripheral device
Sip/Puff Switch
• Origin Instruments, Corporation
• Zero-Power Design, No AC Plug and No Batteries
• The metal switch box contains the devices that
convert sips & puffs to electrical switch closures
• Switch events are accessed from the 1/8"
microphone connectors on the end panel
• Switches are designed for low current electronic loads
• Retail: $295.00
Memory Map
Software Breakdown
• Interrupt from XCS10
• Serial Data Out
• Serial Data In
• Find open slot for data
Interrupt from XCS10
• (State is latched to data bus from
XCS10)
• Processor reads in state from data bus
• Based on state, read in from
appropriate flash memory preset
location (SPI)
• Send data across Serial TX until
signal is complete (SCI)
• Send data out serially
Serial Data Out(memory addr. Z)
• For(I = 0; I < IR signal length; I++)
– Gather memory byte from Z+I
– Send data along serial line
Serial Data In(void)
• For(I = 0; I < IR sig. Len; I++)
– Put memory byte from serial line into
location $TEMP+I
• Find open pre-selected data space->Y
• If(Y == ERROR)
– Memory space all used up, flash
ERROR
– Zero out memory space @ Temp
• Else, move memory from TEMP to Y
Find open data space(void)
• Based on config byte at 0x0000, find
open space in memory for new code
(0 = mem in use) (1 = mem open)
• If no open space, return ERROR
• If there is an open space, return
which space and declare the space
used
Parts List
• Motherboard
– HC11
– Spartan XCS10
• IR
–
–
–
–
–
–
–
TX-IR (Control chip)
4MHz (Resonator)
ZTX601 (Darlington circuit)
IR LED (+ 10 deg high power)
TSOP-1140 (IR receiver)
MAX223CPP (DIP-drives voltage to 12V)
PIC 16C84-04 (Controller for adapter)
Parts List Continued
• Switches
– Sip / Puff
– Buttons
• Misc
– Batteries
• 12 Vdc 4Ah NiMH (2)
– Servos
• Hitec Hobby Servos (2)
Schedule
Milestone 1
•
•
•
•
Boot up HC11
FPGA Runs Basic Logic
State Machine Logic Encoded
Transmitter/Receiver Hardware Built
Milestone 2
•
•
•
•
FPGA Debugged and Working
Read/Write to RAM
IR Signals Can be Learned
Switches Interfaced with FPGA
Division of Labor
• Motherboard – Winter, Justin,
Denknesh
• IR – Paul, Florence, Justin
• Sip/Puff – Florence, Denknesh
• Boot Code – Paul
• User Manual - Winter
• Technical Reference Manual Everyone
Questions?