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University of Heidelberg
Kirchhoff-Institut for Physics
Features and Architecture of
the CIA Board
Deyan Atanasov, Venelin Angelov, Volker Lindenstruth
([email protected], angelov@ kip.uni-heidelberg.de,
voli@ kip.uni-heidelberg.de)
L1 Review
Lausanne, 14.06.2002
Application and Requirements
Major application:
An intelligent hardware agent attached to each
computing node in the processing farm in order system
monitoring and control to be implemented.
Features required:
• a CPU;
• FDD emulation;
• Memory;
• Access to power and
• PCI;
reset
• Ethernet connection;
system.
lines
of
the
A Simplified Block Diagram
CPLD
Ethernet
ALTERA®
System
Real Time Clock
Serial EEPROM
MAX7000AE®
Optocplr
32-bit
Memory
Unit
64-bit
Memory
Unit
SRAM
FLASH
SRAM
SDRAM
FPGA
2 x PS/2
VGA
LVDS
TX/RX
ALTERA®
APEXTM20KE
Serial
Interfaces
RS232
IrDA
USB
CAN
ADC
DAC
CMC Connectors
FDD Connector
64-bit PCI Connector
Power
Supply
Unit
FPLDs Configuration Circuit
PPS Config Scheme
CPLD
Configuration
Altera AN 116
Config
FLASH
FPGA
ADDR
DATA
DATA[7..0]
DCLK
Config Cntrl Pins
Controller
TMS
TCK
TDO
TDI
TDI
TDO
TCK
TMS
JTAG Chain
JTAG
Port
Power Management
On-board
Power
Supply
Unit
PCI
Power
sense
Voltage
Monitor
in1
cntrl
in2
Relay
out
Li +
JP
To the on-board
components
Battery
Unit
Clock Distribution
JP
On-board
Oscillator
66 MHz
FPGA
PLL1
in
JP
out
External clock
driver
32-bit
Memory
Module;
CPLD
Channel 1
PLL2
in
JP
out
JP
On-board
Oscillator
X MHz
PLL3
in
PLL4
MUX
in
PCI
out
out
Channel 2
62-bit
Memory
Module
The CIA Board Features and Resources
Overview I
On-board Resources:
Memory:
Serial Interfaces:
• 8 Mbyte FLASH EEPROM;
• RS232;
• 18 Mbyte + 9 Mbyte
• 2 X PS/2;
synchronous SRAM;
• up to 512 Mbyte SDRAM;
Network Interfaces:
• 10 Mbps Ethernet;
• CAN (up to 1 Mbps);
• IrDA (115 kbps);
• USB (1.5 Mbps/12 Mbps);
• 4 X Optocouplers;
• 2 x LVDS (400 Mbps);
The CIA Board Features and Resources
Overview II
Power:
• 25 W max PCI Operation;
• Stand-alone power supply by using 6 V DC external power
supply;
• Battery supply provided by Lithium-Ion rechargeable battery;
The CIA Board Features and Resources
Overview III
Other Features:
• supports VGA port;
• on-board serial EEPROM for storing PCB auxiliary information
(serial number, design version, etc);
• on-board Real Time Clock;
• FDD emulation;
• hosts a Common Mezzanine Card (CMC);
• Serial ADC (10-bit, 4-channel) and DAC (10-bit, dual).
Things to be changed in the second prototype I
• The relay to be substituted for a powerful MOSFET
(for instance FQP140N03L);
• The Ethernet support to be improved (100 Mbps);
• The power save features provided by many of the
on-board components to be used in order a better
power management to be achieved;
• Availability of memory components with higher
capacity to be checked and such components to be
upgraded (reason: too many on-board components
at this stage). Such activity is partly possible in the
current PCB design;
Things to be changed in the second prototype II
• The power consumption to be clarified so that the
power unit can be optimized (at this stage the power
consumption of the FPGA is hardly predictable);
• The clock distribution could be improved (from PCB
design point of view) by adding external PLLs;
• This list is expected to grow up after running and
debugging the first prototype.
More Applications
• A good substitution for the RUs during development and
prototyping time
(currently 3 Alteras’ PCI cards with big FPGA are used for
such tasks in the processing farm in Heidelberg);
• Hardware for development and prototyping of the
Scheduler;
• Hardware for development and prototyping of the Interface
to the L1-decision Unit (L1-DU);