Transcript Lecture 2

ISA – Chapter 1.7 (CD)
MIPS – Chapter 2
HW/SW facts
• Large hardware structures
– More expensive (yield, #dies per wafer)
– Slower to use each time (phone book)
+ Holds more
• Large instruction size
– More memory required
– Each one is slower
+ Each one does more
+ Fewer instructions per program
• Processor fast … Memory slow
Stack
Processor
TOS
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• “Stack” is internal to the processor.
• ALU operates on top two stack items
•Remove two top values
•Place result on the top of the stack
• Memory operation:
•Explicit push & pop for memory
• RPN calculators are stack machines
• Java JVM is stack-based
D=A*B+C
Memory
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ALU Source1
ALU Source 2 (if different from dest)
ALU dest
Accumulator
Processor
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Only one register
ALU inputs: accumulator & memory
Memory Operations:
explicit load & store
one operand of alu operations
D=A*B+C
Memory
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ALU Source1
ALU Source 2 (if different from dest)
ALU dest
Register (register-memory)
Processor
ALU inputs: register & memory
Memory operations:
Explicit load & store
One operand of ALU operations
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D=A*B+C
Memory
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ALU Source1
ALU Source 2 (if different from dest)
ALU dest
Register (load-store)
Processor
ALU inputs: Two registers
Memory access:
Only through load & store
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D=A*B+C
Memory
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ALU Source1
ALU Source 2 (if different from dest)
ALU dest
Core Differences
Stack
Accumulator
Reg-Mem
Reg-Reg
TOS
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Memory
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Memory
• Which access memory every instruction?
• Which have access to any values inside the
processor at any time?
Summary
• Registers are _____ – Memory is ______
• Instruction reordering is important for
__________
• Leads to __________________
architectures
• Was this always the case? Why were the
others ever built?
MIPS Assembly Language
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Load-Store architecture
Arithmetic ops only on regs
Reads <= two regs per instruction
Writes <= one reg per instruction
Simple instructions
32 total registers
Arithmetic Operations
• add $2, $3, $5 ------ $2 = $3 + $5
– destination is first
– add, sub, addu, subu (unsigned)
– and, or, xor
• addi $2, $3, 10 ------ $2 = $3 + 10
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destination is first
“immediate value” (constant) encoded into inst
andi, ori, xori,
sll (shift left logical) , srl (shift right logical)
Multiply, Divide:
Using the Co-Processor
• mult $s2, $s3 -- HI, LO = $s2 * $s3
• div $s2, $s3 - LO = $s2 / $s3,
HI = $s2 % $s3
• mfhi $s1 -- $s1 = HI
• mflo $s1 -- $s1 = LO
$s1 = $s2 * $s3
mult $s2, $s3
mflo $s1
$s1 = $s2 / $s3
div $s2, $s3
mflo $s1
$s1 = $s2 % $s3
div $s2, $s3
mfhi $s1
Multiply, Divide:
Using simple operations
Exploiting binary numbers
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$s2 = $s1 * 2n == ____________
____________
$s2 = $s1 / 2n == ____________
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$s2 = $s1 % 2n == ____________
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