Transcript Optical interconnect rationale (2) - Universiteit Gent

System level behaviour of
VCSEL-based optical interconnects:
a circuit-level simulation approach
Michiel De Wilde
Electronics and Information Systems dept.
Olivier Rits
Information Technology dept.
Ghent University — IMEC, Belgium
IST project “Interconnect by Optics”
A circuit-level simulation approach for VCSEL-based optical interconnect – 1 –
Optical interconnect rationale
(www.intel.com)
A circuit-level simulation approach for VCSEL-based optical interconnect – 2 –
Optical interconnect rationale (2)
0101
01010011
1011
10110010
• Packet routers
• Parallel and distributed processing systems
A circuit-level simulation approach for VCSEL-based optical interconnect – 3 –
Optical interconnect rationale (3)
L
A
Wire capacitance + resistance & skin effect
 bit-rate limit:
A
B  10 2 bits / s
L
17
(Miller-Özaktas)
A circuit-level simulation approach for VCSEL-based optical interconnect – 4 –
Optical interconnect rationale (4)
• Physical solution: use of optics
– No electromagnetic wave phenomena (crosstalk)
– Losses barely sensitive to distance & frequency
– Potential to scale much better than wires
• Advantage in using optical interconnects
for ever decreasing distances
– From chip to chip: onboard, and board to board
A circuit-level simulation approach for VCSEL-based optical interconnect – 5 –
VCSEL-based parallel optical I/O
Multi-waveguide connectors (e.g. overmoulded POF bundles)
Parallel waveguides (e.g. POF flexes)
Hybridised 2D VCSEL array
Hybridised 2D photodetector array
optical devices
silicon
A circuit-level simulation approach for VCSEL-based optical interconnect – 6 –
Design space
Chip packaging technology
for optical access
CMOS hybridisation
VCSEL technology family
Photodetector technology family
Waveguide & interconnection technology
(ribbons, flexes, planar integration)
TX
Interface circuits of electro-optical devices
Digital encoding & clock recovery systems
A circuit-level simulation approach for VCSEL-based optical interconnect – 7 –
Design space (2)
• Continuously-valued design parameters as well
– λ, operating currents, numerical aperture…
• Choices affect system-level characteristics
– Technological feasibility (interoperability, yield)
– Timing characteristics (delay, skew)
– Reliability
(spikes, power  temperature, misalignment)
– Monetary cost
A circuit-level simulation approach for VCSEL-based optical interconnect – 8 –
Design space exploration
•
Tradeoffs between choices
–
–
Multi-objective
Counteracting effects
Increase of numerical aperture
VCSEL
Better coupling
photodiode
Worse coupling
•
Find: systematic way of making choices
= design methodology
•
Goal: formalized into a design tool
bend
Less losses
1. The designer states system-level characteristics
2. The design tool assists in making product and parameter
choices
A circuit-level simulation approach for VCSEL-based optical interconnect – 9 –
Design methodology development
Product and parameter choices
(e.g.) link bit error rate
VCSEL drive current
Photodetector sensitivity
Fiber numerical aperture
Interface technology
…
STAGE 1
STAGE 3
predict
target
System-level link properties
Power dissipation
Link latency
Link reliability
Link skew
Implementation cost
…
Sub-optimal
designs
Pareto-optimal
designs
Infeasible
design region
(e.g.) total power dissipation
STAGE 2
Construct multi-objective solution
A circuit-level simulation approach for VCSEL-based optical interconnect – 10 –
Design methodology focus: step 1
Predicting effect of design alternatives
• Issues for direct estimation
(e.g. from tabular data)
– Difficult prediction of noise/variation propagation
– Dynamic multi-domain interactions (electrical, optical, thermal)
• Implement framework for time-domain link simulation
to
– Estimate system-level properties for various setups
– Verify behaviour of optical interconnect within a digital system
(mixed-signal simulation)
A circuit-level simulation approach for VCSEL-based optical interconnect – 11 –
Simulation framework:
link “building block” models
• Circuit-level behavioural models
instead of physical models
– Only time-dependent equations
– No spatial dependency
• Mixed-signal Verilog-AMS (or VHDL-AMS)
instead of SPICE
– Direct expression of differential equations
– Native support for signals in different domains
A circuit-level simulation approach for VCSEL-based optical interconnect – 12 –
Example: photodiode model
module pin_photodiode(in,anode,cathode);
input in;
inout anode, cathode;
power in;
electrical anode, cathode;
parameter real Cdep=0, Cbo=0,
Rbas=0, Resp=0, Id=0;
parameter real pole=-1/(Cdep*Rbas);
parameter real laplace_coeff_0=Cdep+Cbo;
parameter real laplace_coeff_1=Cdep*Cbo*Rbas;
charge rc;
analog begin
I(cathode,anode) <+ laplace_zp(Resp*Pwr(in)+Id,{},{pole,0});
Q(rc) <+ laplace_np(V(cathode,anode),{laplace_coeff_0,laplace_coeff_1},{pole,0});
end
endmodule
•Terminals
•Model parameters
•Equations describing
internal state and outputs
A circuit-level simulation approach for VCSEL-based optical interconnect – 13 –
Simulation framework:
model hierarchy
Behavioural models (Verilog-AMS) – with symbolic parameters
Driver
VCSEL #1
VCSEL #2
Optical path
Photodetector
Receiver
Model instantations with parameters (Spectre netlist files)
Driver #1
#2
VCSEL #1
#2
Interconnect specification #1
Optical path
Photodetector
Receiver
Interconnect specification #2
Complete interconnect specifications (Spectre netlist files)
A circuit-level simulation approach for VCSEL-based optical interconnect – 14 –
Driver/receiver model
• Normal analog electrical circuits
• IP protection: no real circuit provided
• Alternative: parameterised flowchart
Photocurrent
input
Transimpedance preamplifier
Digital output
Limiting amplifier
Postamplifier
Decision circuit
Receiver flowchart
A circuit-level simulation approach for VCSEL-based optical interconnect – 15 –
Equaliser
VCSEL model
• Nonlinear 1st order differential equation system
Output power
Steady state solution
(M.X. Jungo)
VCSEL current
Bad steady state solution
• Issue: getting an initial solution
• VCSEL characterisation is hard
A circuit-level simulation approach for VCSEL-based optical interconnect – 16 –
Fiber-based optical path
• Abstraction of dispersion (short distance)
• Coupling coefficients for losses & crosstalk
VCSEL-fiber
coupling losses
VCSEL
adjacent
VCSEL
Macrobend
losses
VCSEL-fiber
crosstalk
Fiber-detector
crosstalk
& coupling losses
Absorption
Connector
losses & crosstalk
adacent
photodetector
photodetector
• TBD: Statistical modelling of misalignment
A circuit-level simulation approach for VCSEL-based optical interconnect – 17 –
Fiber bend losses
• Currently: accumulate bend losses
using a table obtained by raytracing (H. Lambrecht)
90° bend
X axis: NA fiber
Y axis: bending radius
Blue color = high losses
• TBD: Take into account that the mode distributions do
not directly stabilise after a bend
A circuit-level simulation approach for VCSEL-based optical interconnect – 18 –
Simulation features
• Process corner simulation
– Best-case or worst-case value for all model parameters
– Lower and upper boundaries are not very tight
• Statistical simulation (partly TBD)
– Time-invariable statistics:
• Inter-process & intra-process variations
• Misalignment
– Dynamic statistics:
• Noise (e.g. VCSEL RIN noise)
• Effects like power supply spikes
A circuit-level simulation approach for VCSEL-based optical interconnect – 19 –
Simulation example: transient
1 link with
10dB
attenuation
in the
optical path
(exaggerated VCSEL model parameters)
A circuit-level simulation approach for VCSEL-based optical interconnect – 20 –
Conclusion
• Framework for simulation of guided wave
optical interconnect systems
– Design methodology development: enable prediction
of system-level interconnect characteristics
– Mixed-signal simulation of optical interconnect
within a digital system
• Operational, but not yet mature
– Simulation is doable, characterisation is hard
(especially statistical characterisation)
A circuit-level simulation approach for VCSEL-based optical interconnect – 21 –
Acknowledgements
• IST Interconnect by Optics Project
– Helix AG: driver/receiver block diagrams
– Avalon Photonics: VCSEL measurements
– Hannes Lambrecht (Ghent University, IMEC-INTEC):
macrobend losses
• Fund for Scientific Research – Flanders
(Belgium) (F.W.O.)
– Research assistantship
A circuit-level simulation approach for VCSEL-based optical interconnect – 22 –
Thermal effects
• Temperatures are difficult to predict
• VCSELs are very temperature sensitive
• Operating temperature of up to 85°C
• Temperature distribution in the simulation
– Simulator implementation: not difficult
– TBD: Estimate expected temperature differences in
a VCSEL array
A circuit-level simulation approach for VCSEL-based optical interconnect – 23 –