Transcript FCal-LSB.LArIntReviewx

Forward Calorimeter
Layer Sum Boards
Phase I Upgrade
LAr Internal Review
J. Rutherfoord
29 May 2015
FCal LSBs for Phase I
Goals of the Phase I upgrade
Description of the baseline
Present status
23 September 2014
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One FCal1 -slice
Will be 12 trigger towers
per -slice
Now
Proposed
Now just 4 trigger
towers per -slice
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FCal front-end is different
Trigger summing
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No summing in depth
All LSB inputs are individually weighted by
sin() – Of order 10 variation
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FCal Layer Sum Bds
Layer Sum Board
Layer Sum Boards will provide
finer segmentation, i.e. less
summing.
Will maintain legacy summing
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FCal1 LSB Schematic
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FCal1 Phase I Layer Sum Board
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Dynamic range
Table is everywhere in units of ET
In FCal, kinematic limit determined at s = 14 TeV
Choose pT = 512 GeV as upper limit for all FCal
trigger towers for now  No saturation!
Use shaper linear mixer output upper limit of 3.0 V
Set linear mixer gains as low, hi, hi
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Resistor values assuming 512 GeV pT and linear mixer 3.00 V
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Test (dummy) boards
Front-End Board (with LSB slots)
Calibration board

Input from pulse generator to mux which
drives 128 lines
LTDB with mux from inputs to output to
digital scope
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“Dummy” Front End Board layout
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FCal1 prototype Phase 1 LSB
100 ns
Input: pin 02
Output: pin 49
Rise: 35 ns
Amp: 2.5 Vpp
Only one power
and one ground
pin connected
for this test.
23 September 2014
2.5 V
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FCal1 LSB prototype: Normal x-talk
100 ns
Input: 2.5 Vpp
Output: 3 mVpp
5 mV
0.1% x-talk
2.5 V
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FCal1 LSBOnly case of bad x-talk
100 ns
Input: 2.5 Vpp
Output: 50 mVpp
2% x-talk
50 mV
2.5 V
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Present status
FCal1 LSB pcb stuffed and tested
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Flaw – One channel in one location has crosstalk exceeding specs. Easy to fix.
Possible mix-up on which pair to sum.
Three dummy FEB pcbs stuffed – ready to
test
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