Transcript ppt - SEAS
ESE370: Circuit-Level Modeling, Design, and Optimization for Digital Systems Day 2: August 29, 2014 Transistor Introduction 1 Penn ESE370 Fall2014 -- DeHon Today • MOSFET • Capacitive and resistive loads • Zero-th order transistor model – Good enough for [what?] • Diagnostic Quiz (12:40pm) 2 Penn ESE370 Fall2014 -- DeHon MOSFET • Metal Oxide Semiconductor Field Effect Transistor – New device – Primary active component for the term – Three terminal device • Voltage at gate controls conduction between two other terminals (source, drain) 3 Penn ESE370 Fall2014 -- DeHon MOSFET Ids vs. Vgs, Vds Vgs = Vg-Vs Vds = Vd-Vs IDS 4 Penn ESE370 Fall2014 -- DeHon MOSFET I vs. Vgs, Vds • Will dig into understanding during term • Today: simple ways to reason about gross behavior – Static/DC 5 Penn ESE370 Fall2014 -- DeHon Preclass • What voltage do the cases converge to? 6 Penn ESE370 Fall2014 -- DeHon Final Voltage? 7 Penn ESE370 Fall2014 -- DeHon Final Voltage? 8 Penn ESE370 Fall2014 -- DeHon Final Voltage? 9 Penn ESE370 Fall2014 -- DeHon Final Voltage? 10 Penn ESE370 Fall2014 -- DeHon Conclude? • DC/Steady-State – Ignore the capacitors – Look like “open circuit” 11 Penn ESE370 Fall2014 -- DeHon Quasistatic • Static – inputs (and circuit) unchanging, how does it settle? • Dynamic – what happens when things change • Quasi-Static – inputs transition, circuit responds, and settles – Dynamic transition to roughly static states 12 Penn ESE370 Fall2014 -- DeHon Quasistatic Relevance? • How relevant to a combinational digital circuit? • How relevant to a clocked digital circuit? 13 Penn ESE370 Fall2014 -- DeHon Zero-th Order MOSFET • Ideal Switch Vgs > Vth conducts Vgs < Vth does not conduct Vth – threshold voltage • Gate draws no current from input – Loads input capacitively 14 Penn ESE370 Fall2014 -- DeHon Zero-th Order MOSFET IDS Vgs = Vg-Vs Penn ESE370 Fall2014 -- DeHon 15 N-Type, P-Type MOSFET • N – negative carriers – electrons • Switch turned on positive Vgs • P – positive carriers – holes • Switch turned on negative Vgs Vthp<0 Vgs<Vthp to to conduct 16 Penn ESE370 Fall2014 -- DeHon Electrons and Holes 17 Penn ESE370 Fall2014 -- DeHon Symmetry • Device is symmetric • Doesn’t know source from drain • Think of it as a resistor: – Also doesn’t know difference between two ends – Which way does current flow? • N-type: – Electrons are carriers – Electrons charged? • negative – Electrons flow from srcdrain – From which voltage? • Lowest voltagehighest – Drain is ? • most positive terminal 18 Penn ESE370 Fall2014 -- DeHon Symmetry • Device is symmetric • Doesn’t know source from drain • Think of it as a resistor: – Which way does current flow? • P-type: – Holes are carriers – Holes charged how? • positively – Holes flow from srcdrain – From which voltage? • Highest voltagelowest – Drain is? • most negative terminal 19 Penn ESE370 Fall2014 -- DeHon Zero-th Order MOSFET IDS 20 Penn ESE370 Fall2014 -- DeHon Why zero-order useful? Note S, D annotation on this slide (won’t be labeled in future) Why is it this way? 21 Penn ESE370 Fall2014 -- DeHon What happens when Vin=Vdd>Vthn Penn ESE370 Fall2014 -- DeHon Vgs = Vg-Vs Vthp=-Vthn 22 What happens when Vin=Vdd>Vth Penn ESE370 Fall2014 -- DeHon Vgs=Vg-Vs=Vdd > Vthn Vthp=-Vthn 23 What happens when Vin=Vdd>Vth Penn ESE370 Fall2014 -- DeHon Vgs=Vdd > Vth Vthp=-Vthn 24 What happens when Vin=Vdd>Vth Vthp=-Vthn Vgs=0 > Vthp Penn ESE370 Fall2014 -- DeHon Vgs=Vdd > Vth 25 What happens when Vin=Vdd>Vth Vthp=-Vthn Vgs=0 > Vthp Penn ESE370 Fall2014 -- DeHon Vgs=Vdd > Vthn 26 What happens when Vin=Vdd>Vth Vthp=-Vthn Vgs=0 > Vthp V2=Gnd Penn ESE370 Fall2014 -- DeHon Vgs=Vdd > Vthn 27 What happens when Vin=Vdd>Vth Vthp=-Vthn Vgs=0 > Vthp V2=Gnd Penn ESE370 Fall2014 -- DeHon Vgs=Vdd > Vthn Vgs=0 < Vthn 28 What happens when Vin=Vdd>Vth Vgs=0 > Vthp Vthp=-Vthn Vgs=-Vdd < Vthp V2=Gnd Penn ESE370 Fall2014 -- DeHon Vgs=Vdd > Vthn Vgs=0 < Vthn 29 What happens when Vin=Vdd>Vth Vgs=0 > Vthp Vthp=-Vthn Vgs=-Vdd < Vthp V2=Gnd Penn ESE370 Fall2014 -- DeHon Vgs=Vdd > Vthn Vgs=0 < Vthn Vout=Vdd 30 What happens when Vin=0<Vth Work on board Penn ESE370 Fall2014 -- DeHon 31 What happens when Vin=0<Vth V2=Vdd Vout=0 32 Penn ESE370 Fall2014 -- DeHon What function? Buffer • Vin=Vdd Vout=Vdd • Vin=0 Vout=0 33 Penn ESE370 Fall2014 -- DeHon Why Zeroth Order Useful? • Allows us to reason (mostly) at logic level about steady-state functionality of typical gate circuits • Make sure understand logical function (achieve logical function) before worrying about performance details 34 Penn ESE370 Fall2014 -- DeHon Why adequate? • Static analysis – can ignore capacitors • Capacitive loads – resistances don’t matter • Feed forward for gates – – don’t generally have loops – can work forward from known values • Logic drive to voltage rails (rail-to-rail) – Don’t have to reason about intermediate voltage levels 35 Penn ESE370 Fall2014 -- DeHon What not tell us? • Delay • Dynamics • Behavior if not – Capacitively loaded – Acyclic (if there are Loops) – Rail-to-rail drive 36 Penn ESE370 Fall2014 -- DeHon Big Ideas • MOSFET Transistor as switch • Purpose-driven simplified modeling – Aid reasoning – Sanity check – Simplify design 37 Penn ESE370 Fall2014 -- DeHon Admin • HW1 out – Can reason through pr 1 from today’s lecture – Try to work over weekend • Monday holiday: Labor Day • Office Hours – Prof. (Levine 270) T 4:15-5:30pm – (poll for TA office hours on Wed.) • Advice Reminder: Should be thinking about this course every 38 day. Penn ESE370 Fall2014 -- DeHon Diagnostic Quiz Turnin Quiz and feedback before leaving (do not turnin preclasskeep that) 39 Penn ESE370 Fall2014 -- DeHon