Transcript ppt - SEAS

ESE370:
Circuit-Level
Modeling, Design, and Optimization
for Digital Systems
Day 2: August 29, 2014
Transistor Introduction
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Penn ESE370 Fall2014 -- DeHon
Today
• MOSFET
• Capacitive and resistive loads
• Zero-th order transistor model
– Good enough for [what?]
• Diagnostic Quiz (12:40pm)
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Penn ESE370 Fall2014 -- DeHon
MOSFET
• Metal Oxide Semiconductor
Field Effect Transistor
– New device
– Primary active component for the term
– Three terminal device
• Voltage at gate controls conduction between
two other terminals (source, drain)
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Penn ESE370 Fall2014 -- DeHon
MOSFET Ids vs. Vgs, Vds
Vgs = Vg-Vs
Vds = Vd-Vs
IDS
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Penn ESE370 Fall2014 -- DeHon
MOSFET I vs. Vgs, Vds
• Will dig into
understanding
during term
• Today: simple ways
to reason about
gross behavior
– Static/DC
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Penn ESE370 Fall2014 -- DeHon
Preclass
• What voltage do the cases converge to?
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Penn ESE370 Fall2014 -- DeHon
Final Voltage?
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Penn ESE370 Fall2014 -- DeHon
Final Voltage?
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Penn ESE370 Fall2014 -- DeHon
Final Voltage?
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Penn ESE370 Fall2014 -- DeHon
Final Voltage?
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Penn ESE370 Fall2014 -- DeHon
Conclude?
• DC/Steady-State
– Ignore the capacitors
– Look like “open circuit”
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Penn ESE370 Fall2014 -- DeHon
Quasistatic
• Static – inputs (and circuit) unchanging,
how does it settle?
• Dynamic – what happens when things
change
• Quasi-Static – inputs transition, circuit
responds, and settles
– Dynamic transition to roughly static states
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Penn ESE370 Fall2014 -- DeHon
Quasistatic Relevance?
• How relevant to a combinational digital
circuit?
• How relevant to a clocked digital circuit?
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Penn ESE370 Fall2014 -- DeHon
Zero-th Order MOSFET
• Ideal Switch
Vgs > Vth  conducts
Vgs < Vth  does not conduct
Vth – threshold voltage
• Gate draws no current from input
– Loads input capacitively
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Penn ESE370 Fall2014 -- DeHon
Zero-th Order MOSFET
IDS
Vgs = Vg-Vs
Penn ESE370 Fall2014 -- DeHon
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N-Type, P-Type MOSFET
• N – negative
carriers
– electrons
• Switch turned on
positive Vgs
• P – positive carriers
– holes
• Switch turned on
negative Vgs
Vthp<0
Vgs<Vthp to
to conduct
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Penn ESE370 Fall2014 -- DeHon
Electrons and Holes
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Penn ESE370 Fall2014 -- DeHon
Symmetry
• Device is symmetric
• Doesn’t know
source from drain
• Think of it as a
resistor:
– Also doesn’t know
difference between
two ends
– Which way does
current flow?
• N-type:
– Electrons are carriers
– Electrons charged?
• negative
– Electrons flow from
srcdrain
– From which voltage?
• Lowest voltagehighest
– Drain is ?
• most positive terminal
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Penn ESE370 Fall2014 -- DeHon
Symmetry
• Device is symmetric
• Doesn’t know
source from drain
• Think of it as a
resistor:
– Which way does
current flow?
• P-type:
– Holes are carriers
– Holes charged how?
• positively
– Holes flow from
srcdrain
– From which voltage?
• Highest voltagelowest
– Drain is?
• most negative terminal
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Penn ESE370 Fall2014 -- DeHon
Zero-th Order MOSFET
IDS
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Penn ESE370 Fall2014 -- DeHon
Why zero-order useful?
Note S, D annotation on this slide (won’t be labeled in future)
Why is it this way?
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What happens when
Vin=Vdd>Vthn
Penn ESE370 Fall2014 -- DeHon
Vgs = Vg-Vs
Vthp=-Vthn
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What happens when
Vin=Vdd>Vth
Penn ESE370 Fall2014 -- DeHon
Vgs=Vg-Vs=Vdd > Vthn
Vthp=-Vthn
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What happens when
Vin=Vdd>Vth
Penn ESE370 Fall2014 -- DeHon
Vgs=Vdd > Vth
Vthp=-Vthn
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What happens when
Vin=Vdd>Vth
Vthp=-Vthn
Vgs=0 > Vthp
Penn ESE370 Fall2014 -- DeHon
Vgs=Vdd > Vth
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What happens when
Vin=Vdd>Vth
Vthp=-Vthn
Vgs=0 > Vthp
Penn ESE370 Fall2014 -- DeHon
Vgs=Vdd > Vthn
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What happens when
Vin=Vdd>Vth
Vthp=-Vthn
Vgs=0 > Vthp
V2=Gnd
Penn ESE370 Fall2014 -- DeHon
Vgs=Vdd > Vthn
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What happens when
Vin=Vdd>Vth
Vthp=-Vthn
Vgs=0 > Vthp
V2=Gnd
Penn ESE370 Fall2014 -- DeHon
Vgs=Vdd > Vthn
Vgs=0 < Vthn
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What happens when
Vin=Vdd>Vth
Vgs=0 > Vthp
Vthp=-Vthn
Vgs=-Vdd < Vthp
V2=Gnd
Penn ESE370 Fall2014 -- DeHon
Vgs=Vdd > Vthn
Vgs=0 < Vthn
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What happens when
Vin=Vdd>Vth
Vgs=0 > Vthp
Vthp=-Vthn
Vgs=-Vdd < Vthp
V2=Gnd
Penn ESE370 Fall2014 -- DeHon
Vgs=Vdd > Vthn
Vgs=0 < Vthn
Vout=Vdd
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What happens when
Vin=0<Vth
Work on board
Penn ESE370 Fall2014 -- DeHon
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What happens when
Vin=0<Vth
V2=Vdd
Vout=0
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Penn ESE370 Fall2014 -- DeHon
What function?
Buffer
• Vin=Vdd  Vout=Vdd
• Vin=0  Vout=0
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Penn ESE370 Fall2014 -- DeHon
Why Zeroth Order Useful?
• Allows us to reason (mostly) at logic
level about steady-state functionality of
typical gate circuits
• Make sure understand logical function
(achieve logical function) before
worrying about performance details
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Penn ESE370 Fall2014 -- DeHon
Why adequate?
• Static analysis – can ignore capacitors
• Capacitive loads – resistances don’t matter
• Feed forward for gates –
– don’t generally have loops
– can work forward from known values
• Logic drive to voltage rails (rail-to-rail)
– Don’t have to reason about intermediate voltage
levels
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Penn ESE370 Fall2014 -- DeHon
What not tell us?
• Delay
• Dynamics
• Behavior if not
– Capacitively loaded
– Acyclic (if there are Loops)
– Rail-to-rail drive
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Penn ESE370 Fall2014 -- DeHon
Big Ideas
• MOSFET Transistor as switch
• Purpose-driven simplified modeling
– Aid reasoning
– Sanity check
– Simplify design
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Penn ESE370 Fall2014 -- DeHon
Admin
• HW1 out
– Can reason through pr 1 from today’s lecture
– Try to work over weekend
• Monday holiday: Labor Day
• Office Hours
– Prof. (Levine 270) T 4:15-5:30pm
– (poll for TA office hours on Wed.)
• Advice Reminder:
Should be thinking about this course every
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day.
Penn ESE370 Fall2014 -- DeHon
Diagnostic Quiz
Turnin Quiz and feedback
before leaving
(do not turnin preclasskeep that)
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Penn ESE370 Fall2014 -- DeHon