Transcript Ericsson meets SMID

Ericsson meets SMID
April, 2011
Agenda
› 4th April
– Ericsson presentation
– Statistical tools in manufacturing
– DMAIC/IDDOV
› 7th April
– Define
– Measure
› 11th April
– Analyze
› 14th April
– Implement
– Control
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About Authors 1/2
› Mauro Guidetti
› Operational unit:
– BNETSU PRODUCT INTRODUCTION MGMT (Genoa)
[email protected]; +39 335 7184 430)
› Role:
– Head of Supply Product and System Management
› Professional Background:
–
–
–
–
2Y digital board simulation engineer (Marconi, R&D)
3Y Site Manager (Telecom Italia, CLGRA Sanremo Italy)
3Y ICT Test Manager (Marconi Comms, Manufacturing NPI)
2Y Program Manager + 3Y Test Manager (CISCO Systems - Photonics
Dept. - Italy)
– 3Y Test manager in Ericsson
› Privately
– 45yo, Married, 2 daughters (10 and 7 years old)
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About Authors 2/2
› Patrizia Ratto
› Operational unit:
– BNET Supply Product Introduction Management (Genoa
[email protected]; +39 334 6931254)
› Role:
– Operational Excellence and Development Manager
› Professional Background:
– Degree in Computer Science
– Master Technology Management
– Six Sigma Black Belt
› Carrier path
– 5Y Software Engineering (Marconi Software)
– 8Y Test Solution Development Manager (Marconi Communications)
– 6Y Operational Excellence and Development (Ericsson)
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One century History:
Marconi & Ericsson
Our History
› 3rd April 1909 : Officine Marconi opening in Genoa harbor
› 1952/53: Marconi Italiana moves the headquarter in via Negrone (Sestri
Ponente)
› 1967: Organisation changes according to the two business.
Civil telecommunications products and systems.
Military products and systems (telecommunications and avionics)
› ‘70: Huge increase of business volumes both domestic and international.
› ’80 : International trading rapid increase. Birth of “Marconi Italiana Asia Pacific”
and “Marconi Malaysia”.
› ’90 : Focus on technological innovation and product portfolio strengthening.
Marconi S.p.A. takes over Gec-Marconi Communications Limited and moves to
Italy both civil and military telecommunications
› ’98: Merging Marconi Spa and Gpt limited a new company, Marconi
Communications, borns.
› ’99: Strategic acquisitions:
RELTEC Corporation and Fore Systems (US)
RDC (Israel)
SDH/DWDM transport systems dept. from Nokia Telecommunications.
Public Networks business from Bosch GmbH (Germany).
 GEC plc renamed Marconi plc. Transfer of military activities, focus on IT and
telecommunications
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THe Ericsson Acquisition
› 2000: Operative activities split between Marconi
Communications SpA and Marconi Mobile SpA
› 2002: Marconi Mobile transferred to Finmeccanica
› 2003: OTE and Marconi Mobile Access transferred to
Finmeccanica
› 2004: Outside Plant & Power business transferred to
Emerson.
› 2005: Marconi Communications shares acquired by
Ericsson
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Ericsson in ItalY
 Historical Ericsson market (since 1918)
 Company HQ in Rome (market, services)
 R&D HQ in Genova
 Revenues : > 1 billion Euro
 About 5000 employees
 1100 R&D engineers in 4 sites:
Genova, Milano, Pisa, Pagani (SA)
 Supply site in Caserta for Broadband Optical products
2005 - Marconi acquisition
2010 - Pride S.p.A. acquisition
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R&D Italy
WORLDWIDE ECOSYSTEM
GOTHENBURG
STOCKHOLM
OTTAWA
BEIJING
VANCOUVER
SAN JOSE, CA
PISA
MILANO
BANGALORE
GENOVA
PAGANI
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DUIB
1650 MSek
DUCI
300 MSek
TOT
1950 MSek
The R&D LABS in Italy (since 1975)
Microwave
Modem and MMIC-RFIC for radio applications
Milano
Genova
Optical Networks
PDU responsibility, optical transport,
MSPP (SDH & Ethernet), packet transport
Broadband Access
Central office access platform, xDSLy
Pisa
OSS
Element Management and Network Layer for
ServiceOn Optical, Access and MW
Pagani
Optical Networks
Optical Network planning and control protocols
Research Branch
Regulatory Solutions
New generation photonics
Lawful intercept and data retention
AXE I/O and SW engineering
DU IP & Broadband
OSS
DU Core & IMS
Element Management for MW
WHAT THE STORY SHOWS....
 Full fledge of technologies & managerial competencies from HW and SW
to Project and Product Management
 True attitude to the change
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13
 High |responsiveness
and
committment - Customer Focus
cooperation with universities
and research centers
• Milan-Politecnico
NorTH
• torin-politecnico
• Bologna UNIVERSITY
• genova UNIVERSITY
• Trento UNIVERSITY
Vimodrone
 MW transmission systems
 IP-based transport systems
Genova
CentER
• Sant’Anna SCHOOL
• CNR
• CNIT
• pisa UNIVERSITY
• CoRiTeL
• ROME UNIVERSITIES
 Optical networks and photonics
 SW architettures for BB networks development
SOUTH
• Naples UNIVERSITY
• Salerno UNIVERSITY
• sannio UNIVERSITY
 Security solutions for IP-based networks
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| Commercial
in confidence
| 2011-03-24
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 Data
storage,
advanced
SW architecture
and network mgmnt
Pisa
Pagani
SESSION 1
MANUFACTURING: HOW IT WORKS
How telecoms networks work
Building #2
Building #1
Servers
Core
Access
Phones
PBX
Services
Video
TDM
Mux
Building #3
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Equipments, chassis and cards
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Equipments, chassis and cards
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1
Protection Gbe links
3
Slot management interface
5
4
APS Protection link
Data path Gbe links
Quad
SFP Cage
SFP I/O
Shelf alarms
STM1/4
STM1
AMIU
Fpga
2xRS232
2Gbs serial
2Gbs serial
SDRAM
SDRAM
Main
Bank
Main Bank
RTC
11
60x BUS
8270
uP
PCMCIA
Flash card
BIF
Root
FPGA
SPI-3
DDRs
Ethernet
BIF
Leaf 2
FPGA
2Gbs serial
Utopia L3
APP
530
network processor
FCRAMs
12
BIF
Leaf 3
FPGA
60x BUS
Sync.
Module
PCI
PCMCIA
Bridge
PCI
I2C
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6
1.25Gbs serial to backplane slots
Utopia L2
SDRAM
SDRAM
Aux Bank
Aux Bank
PHAST12P
STM1/STM4
Framer
GMII
60x BUS
7
8Khz sync IN (x2)
8Kz sync IN (x20)
19.44Mhz sync out
960Khz sync out
GMII
Card Front oprical
interfaces
Design Fundamentals
2
BIF
Leaf 1
FPGA
B
U
F
F
E
R
S
EXT REG1 EXT REG2
FLASH
HDLC to cards
9
SPI to
connection
module
8
Ethernet
To Mate CP
10
Boards Production Flow
Pack and ship
Functional test
In Circuit test
Power supply test
X –Ray test
SMT line
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SMT – Line
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SMT – Solder Paste
Solder Paste Applied
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SMT – Pick and Place
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SMT – Pick and Place Reels
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SMT – Pick and Place Top Side
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SMT – Soldering (Owen)
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TEST IN MANUFACTURING
Xray
› The purpose of XRAY inspection is to identify solder
defects such as solder shorts, open device pins, insufficient
solder on device pins, and missing components, and use
the information for:
– PCA (Printed Circuit Assembled) process development and
characterization during proto build and pilot production, and
– Continuous process monitoring, feedback and control during
sustained production.
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Complexity index calculation
Complexity Index = ( #C + #J )
100
*S*M*D
3179 = Number components
16365 = Number joints
S
= 1 (Double sided)
M
= 1 (High mix)
D
= 0.917 = Joints per square inch / 100
or Joints per square cm / 15.5
D = [16365/(10.6*16.8)] / 100 = 0.917
Complexity Index =
( 3179 + 16365 )
* 1 * 1 * 0.917 = 179
100
Therefore, this is classified as a High Complexity board
Low complexity
Medium complexity
High complexity
< 50
>= 50 and < 125
>= 125
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X-Ray – Pictures
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X-Ray – Pictures 2
Process Debris
causing Short
Insufficient Solder
and No Solder
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X-Ray – Pictures 3
Insufficient
Solder
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AOI - Automated Optical Inspection
› The purpose is to verify component presence and visible solder defects
› Automated Inspection
– Pre-Reflow
› Limited to Component Presence
– Orientation and Component Type not reliable enough to be useful
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ICT (In Circuit Test)
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ICT – Bed of Nails
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ICT (In Circuit Test)
› The purpose of ICT is to identify PCA (Printed Circuit
Assembled) Defects.
› Using a bed of nails in-circuit test equipment is able gain
access to the circuit nodes on a board and measure the
performance of the components regardless of the other
components connected to them.
› Parameters such as resistance, capacitance and so forth
are all measured along with the operation of analogue
components such as operational amplifiers. The
functionality of digital circuits can also be measured
› It generates fail reports can be easily interpreted by an
operator
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Functional traffic test structure
Axh chassis
modems
Line simulators
Smarbits
Pc
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Functional Test philosophy
› Rack and Stack solution
› Device Under Test (DUT) inside the chassis
– Some test solution are using a custom test fixture to interact w/ the
DUT
› Software Test suite
– Custom Sequencer
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PART 2
USAGE OF STATISTICAL TOOLS IN
MANUFACTURING
Definitions
›A “defect” is defined as a nonconformance of a quality characteristic to its
specification.
Yield = Pass / Trials
Lower
Tolerance
Limit
Upper
Tolerance
Limit
p(d) = (1- Yield)/100
Yield
Defects
Defects per Unit
The average number of defects per unit.
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Definitions/2
› Defects per Opportunity is the probability of units produced
with zero defects by the process.
DPO =
 defects
 units
* opportunities
› Defects per million opportunities (DPMO) is a measure of
process performance. It is defined as
DPMO =
 defects
 units
*
 opportunities
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* 1 000000
Defects per units and yields
›
Y = e -DPU
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Yields versus DPMO
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Test strategy and test overlap
› The test strategy involves several test steps distributed in
the production line
› Consider a production line including AOI, ICT, FT
– AOI: camera checks presence
– ICT: measurement of the resistor value
– FT: an electrical signal is propagated through the resistor
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Chinese watch Syndrome
A man with one watch knows
what time is it
A man whit two watches is never sure
› Several different metrics make the comparison and
combination impossible
› Coverage must be readable from design to production
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Defects
› Typical defects
– missing components
– wrong value
– misalignment
– polarity
– tombstone
– opens
– broken leads
– insufficient solder
– shorts
› Manufacturing flow
Material
Placement
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Solder
Defect levels vs. test coverages
› The ability to detect defects can be expressed with a
number: coverage.
› Each defect category fits with its test coverage:
P resence
M
Material
M
P olarity (orientation)
P
Placement
P
V alue (material)
S
Solder
S
S older
Defects
Coverages
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Combine test techniques
› Good Coverage = Combination of tests
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Weighted Coverage
› For each category (MPS or PPVS) of defects (D) we
associate the corresponding coverage (C)
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Basic method of defect analysis
› din = input defects:
› Cdx= Tx coverage
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Defect Coverage
› For easy and reusable modeling, it is important to keep separate the
generic defect coverage of the test method and product specific
testability.
› CD = CT x CM
– where CD = Defect Coverage
› CM = Defect Coverage of the Method
› CT = Defect Coverage of the Product (Testability)
› E.g. the generic defect coverage (CM) may be 80 %. However, if
product’s testability (e.g. access) is not good and testability coverage
(CT) is only 50%, the final defect coverage (CD) is no more than
0.50x80% = 40%.
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Complete procedure for 1 test step
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Complete analysis for 2 test steps
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