Transcript Presentation

P08331 – Microcontroller
Board and Tutorial
Adam Geboff – Team Lead, PCB Layout
Jason Marini – Software Development, Documentation
Rob Dunn
– Power Systems, PCB Layout
Prof. Slack
– The Man In Charge
Sponsored by the RIT EE Department
Purpose
Problem
– Senior Design teams panic when it
comes to microcontrollers
Solution
– Have a powerful evaluation board
available to students in order to build
quick prototypes, allowing them to
modify the design of the board for their
final product.
Requirements
• Ready-made layout
• Bill of Materials for board population
• Recent TI DSP
• Debug capabilities
• CD containing
– Plenty of documentation
– Sample code
– Schematic and layout files
Selected Concept
TI TMS320F2809 processor
– 128K Flash
– 18K RAM
– 100MHz PLL frequency
– 32-bit integer operations
– 16 PWM outputs
– Multiple interfaces
• SPI, SCI, CAN, I2C
– 16 12-bit ADC channels
– 35 GPIO pins
– C/C++ support with Code Composer
Selected Concept
MatchPort embedded webserver
– 802.11b/g support
– Eight CPs (configurable pins)
• Can provide remote-control inputs to DSP
• Two CPs are used for I2C communication
with on-board temperature, voltage, and
current sensors.
– RS-232 and 100-BaseT support
• Telnet debug, TFTP upgradeability
• SCI used to program DSP
Selected Concept
Onboard Sensors
– MAX6652 temperature/voltage monitor
• Monitors four voltage levels
– LTC2481
• High-resolution voltage monitor
• Used to calculate current across sense resistor
All sensors use I2C to communicate with the
MatchPort. The MatchPort acts as master,
addressing each IC one at a time to obtain
status updates. Current status is
displayed on a custom webpage.
Wireless Debug
MatchPort
TI controller
Scalability
Designed for scalability
– PC104 interface used in anticipation of future
DSPs with higher pin counts
– Schematics have already been created for two
additional (stackable) boards
• Playground board (I/Os, debounced switches, LEDs)
• Probe board (test points for each signal)
Documentation
Board Manual
– Documents all features and board layouts
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Diagram of processor and I/O boards
How to program the DSP
Application suggestions
Do’s and Don’ts
Extending the design to a new PCB
– Schematics and sample code provided on a CD
– “Quick start” guide to get user up and running
• Correct power input
• Example code from TI
Challenges/Solutions
Challenges
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PCB manufacturer had poor quality control (2 out of 5
boards had bad traces)
Team member destroyed DSP with solder
Lack of intimate knowledge of process or technology
Only one team member with programming skills
Solutions
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Thoroughly tested each PCB before population
Begged and pleaded for overnight delivery of a new
DSP, revoked said member’s soldering privileges
Consulted knowledgeable professors
Other members looked up relevant information
Testing
Layout Errors
– GPIO lines connected directly to the MatchPort as well as
through the CPLD
– CPLD I/Os are set to 1.8V instead of 3.3V
– 10K pullup needed on I2C Data line
– Test Point 5 mysteriously disappeared
– CPLD JTAG header is proprietary Xilinx 6-pin
– Source and Drain swapped on P-channel FETs for active low
LED’s
– Clock too fast on the CPLD (1MHz instead of 10Hz)
Power Regulation
– PTCs take too long to respond
– Reset signals on regulators are outputs, not inputs
– PCB manufacturer does not plate non-round holes on
prototypes
Successes/Failures
Successes
– All discovered problems with the PCB layout have been corrected in
the layout and back-annotated in the schematics.
– I2C interface only took eight hours to implement correctly.
– CPLD state machine.
– MatchPort to DSP hardware interface.
– Functional and polished Web interface.
Failures
– Power system does not respond quickly to improper voltage situations.
• Replace PTCs with fast-acting resettable fuses.
– PCB costs prohibited the production of revision 2 of the DSP board as
well as Playground and Probe boards.
– TI does not yet have a kernel we can use for upload of binary code
wirelessly to DSP.
– Not enough time for GPIO Pin Packet idea (web interface displays
status of all DSP I/Os)