Transcript NA Si Wafer Liaison Report 20131107

NA Silicon Wafer Committee Liaison
Report
Updated November 7, 2013
Meeting Information
• Last meeting
– Tuesday, Oct 29, 2013, NA Fall Standards Meeting
• Intel, Santa Clara, CA
• Next meeting
– Tuesday, April 1, 2014, NA Spring Standards
Meeting
• San Jose/Santa Clara, CA
• www.semi.org/standards for the latest schedule update
NA Silicon Wafer Committee
Committee Chairmen
Dinesh Gupta /STA
Noel Poduje /SMS
Silicon Wafer Committee
C: Dinesh Gupta - STA
C: Noel Poduje – SMS
VC: Mike Goldstein – Intel
TE: Murray Bullis – Materials & Metrology
Specifications
Int’l Annealed Wafers TF
Dinesh Gupta -STA
Int’l 450 mm Wafers TF
Mike Goldstein - Intel
Int’l Epitaxial Wafers TF
Dinesh Gupta - STA
Int’l Polished Wafers TF
Murray Bullis Materials & Metrology
Metrology
Int’l Advanced Wafer
Geometry TF
Noel Poduje – SMS
Jaydeep Sinha – KLATencor
Int’l Test Methods TF
Dinesh Gupta - STA
Int’l Terminology TF
Murray Bullis Materials & Metrology
Int’l Advanced Surface
Inspection TF
Kurt Haller - KLA-Tencor
Int’l SOI Wafers TF
Bich-Yen Nguyen –
SOITEC
Committee
Ballot results
• Documents passed committee review, pending
procedural review
– Doc. 5558, Revision of SEMI MF928-0305 (Reapproved
0211), Test Methods for Edge Contour of Circular Wafers
and Rigid Disk Substrates
– Doc. 5606, Auxiliary Information: Interlaboratory
Evaluation of Method 1 of SEMI MF673, Measuring
Resistivity of Semiconductor Slices of Sheet Resistance of
Semiconductor Films with a Noncontact Eddy-Current
Gage
New SNARFs [1]
• Int’l AWG TF
– SNARF 5540 was revised
• From: Auxiliary Information, Illustration of
Flatness and Shape Metrics for Silicon Wafers
• To: Line Item Revision to SEMI M1-1013,
Specification for Polished Single Crystal Silicon
Wafers (Re: Addition of Related Information:
Illustration of Flatness and Shape Metrics for
Silicon Wafers)
New SNARFs [2]
• Int’l Test Methods TF
– Doc. 5665, Line Item Revision to SEMI MF26-0305
(Reapproved 0211), Test Method for Determining
the Orientation of a Semiconductive Single
Crystal, to correct an error in equations
– Doc. 5666, Revision of SEMI MF928, Test
Methods for Edge Contour of Circular Wafers
and Rigid Disk Substrates
New SNARFs [3]
• Int’l ASI TF
– Doc. 5662, Revision of SEMI M35-1107, Guide for
Developing Specifications for Silicon Wafer
Surface Features Detected by Automated
Inspection
– Doc. 5663, Reapproval of SEMI M58-1109, Test
Method for Evaluating DMA Based Particle
Deposition Systems and Processes
Ballots approved for Cycle 1-2014
• Doc. 5607, Revision of SEMI MF673-0305 (Reapproved 0611), Measuring
Resistivity of Semiconductor Slices of Sheet Resistance of Semiconductor
Films with a Noncontact Eddy-Current Gage
• Doc. 5663, Reapproval of SEMI M58-1109, Test Method for Evaluating
DMA Based Particle Deposition Systems and Processes
• Doc. 5664, Line Item Revision to SEMI M59-0211, Terminology for Silicon
Technology
• Doc. 5665, Line Item Revision to SEMI MF26-0305 (Reapproved 0211),
Test Method for Determining the Orientation of a Semiconductive Single
Crystal to correct an error
• Doc. 5666, Revision of SEMI MF928-0305 (Reapproved 0211), Test
Methods for Edge Contour of Circular Wafers and Rigid Disk Substrates
Int’l 450 mm Wafer TF
• Leader: Mike Goldstein (Intel)
• TF will continue to support the 450 mm program.
• Drafting
– Doc. 5604, Revision to SEMI M1-1013,
Specification for Polished Single Crystal Silicon
Wafer (Re: Addition of Notchless 450 mm
Wafers)
– Doc. 5655, Revision of SEMI M1-1013,
Specifications for Polished Single Crystal Silicon
Wafers (Re: Updating 450 mm wafers edge
exclusion)
Int’l Advanced Wafer Geometry TF [1]
• Leaders:
– Noel Poduje (SMS) & Jaydeep Sinha (KLA-Tencor)
• Discussions:
– Revision to SEMI M78 Guide for determining
Nanotopography to add adjusting filter size
and analysis area
– Guide for Wafer Dimensional Metrology
Based on Interferometric Areal Image
Acquisition Technology
Int’l Advanced Wafer Geometry TF [2]
• Drafting:
– Doc. 5654, Line Item Revision of SEMI M490613, Guide for Specifying Geometry
Measurements Systems for Silicon Wafers for
the 130 nm to 16 nm Technology
Generations
• edge exclusion reduction from 2 mm to 1.5 mm at
16 nm technology generation.
– Doc. 5539, Revision of SEMI MF1390-0707
(Reapproved 0512) ,Test Method for
Measuring Warp on Silicon Wafers by
Automated Non-Contact Scanning
Int’l Advanced Wafer Geometry TF [3]
• Discussed 5 Year Review Due:
– SEMI M67-1109 – ESFQR
• No action at this meeting
– SEMI M68-1109 – ZDD
• Some revision needed regarding data
outside the FQA
– SEMI M70-1109 – Partial site flatness
• No action at this meeting
Int’l Annealed Wafer TF
•
Leader:
–
Dinesh Gupta (STA)
• Doc. 5583, Line Items Revision of SEMI M570413, Specifications for Silicon Annealed
Wafers
– Ballot was issued in cycle 5-2013,
superclean
– Results will be adjudicated at SEMICON
Japan, Dec 2013
Int’l Epitaxial Wafer TF
•
Leader:
–
Dinesh Gupta (STA)
• Doc. 5542, Line Items Revision to SEMI M620413, Specifications for Silicon Epitaxial Wafers
– Ballot was issued in cycle 5-2013, comments
received
– Results will be adjudicated at SEMICON Japan,
Dec 2013
Int’l Advanced Surface Inspection TF
• Leader:
– Kurt Haller (KLA-Tencor)
• Drafting
– Doc. 5662, Revision of SEMI M35-1107, Guide for
Developing Specifications for Silicon Wafer
Surface Features Detected by Automated
Inspection
– Doc. 5663, Reapproval of SEMI M58-1109, Test
Method for Evaluating DMA Based Particle
Deposition Systems and Processes
Int’l Polished Wafer TF [1]
• Leader:
– Murray Bullis (Materials & Metrology)
• Doc. 5543, Line Items Revision of M1-0413,
Specifications for Polished Single Crystal Silicon
Wafers, from SEMICON West meeting
– A minority report was filed on line item 4
(Reference to PV13) to object committee finding
non-persuasive negatives
• ISC rejected, line item 4 will be submitted for
procedural review
Int’l Polished Wafer TF [2]
• Discussion of Document 5506 New Standard:
Guide for Measuring Warp, Bow, and TTV On
Low Stiffness Wafers is being developed in the
3DS-IC Committee
– More discussion of these acquisition technologies is
needed before they are implemented
• Discussion of Edge Roll Off and Flatness Decision
Trees
– Surveying the usage of the metrics in Appendix 1 of
SEMI M1 to determine if only two or three of them
are actually in use
Int’l SOI Wafer TF
• Leader:
– Bich-Yen Nguyen (SOITEC)
• Discussions:
–
–
–
–
MEMS/NEMS group for collaboration and needs
3D-IC group for needs and application of SOI
High resistivity SOI specification
Photonic devices - will contact OPSIS for
presentation
Int’l Terminology TF
• Leader:
– Murray Bullis (Materials & Metrology)
• Doc. 5664, Line Item Revision M59-0211,
Terminology for Silicon Technology
– Proposal to remove following two terms
from SEMI M59:
• 1/e lifetime (te)
• primary mode lifetime (t1)
Int’l Test Methods TF [1]
• Leader:
– Dinesh Gupta (STA)
• Drafting:
– Doc. 5607, Revision of SEMI MF673-0305 (Reapproved
0611), Measuring Resistivity of Semiconductor Slices of
Sheet Resistance of Semiconductor Films with a
Noncontact Eddy-Current Gage
– Doc. 5665, Line Item Revision to SEMI MF26-0305
(Reapproved 0211), Test Method for Determining the
Orientation of a Semiconductive Single Crystal, to correct
an error in equations
– Doc. 5666, Revision of SEMI MF928, Test Methods for
Edge Contour of Circular Wafers and Rigid Disk
Substrates
Int’l Test Methods TF [2]
• Doc. 5313B Line Items Revision of SEMI MF15350707, Test Method for Carrier Recombination
Lifetime in Silicon Wafers by Noncontact
Measurement of Photoconductivity Decay by
Microwave Reflectance
– Proposal was to prepare a Guide similar to SEMI
M40, and revise certain definitions in M59.
– Discussion continue
Question?
• For more information, please contact
Kevin Nguyen at [email protected]