Transcript Slide sem título - Inf

Dealing with Multiple Simultaneous Faults
in Future Technologies
INFORMÁTICA
Carlos Arthur Lang Lisbôa, Erik Schüler , Luigi Carro
SRC TechCon 2005
Future technologies, bellow 90nm, will present transistors so small that they
will be heavily influenced by electromagnetic noise and SEU induced errors.
Since many soft errors might appear at the same time, a different design
approach must be taken.
Motivation
Who cares about multiple
simultaneous transient faults ?
• propagation delays will be shorter than
transient pulses duration
• smaller transistors will be more sensitive to
- electromagnetic noise
- neutron and alpha particles
Module 1
Single Event Upset Origin
wrong output
Module 3
correct output
Module 3
wrong output
10100001
V
O
T
E
R
wrong output
TMR can not withstand multiple upsets
01011110
11011110
Using Stochastic
(1)
Operators
Due to the random nature of SEU induced transient errors, stochastic operators have been
chosen to implement one adder and one multiplier that could withstand multiple soft errors.
Instead of adding or multiplying binary coded values, those devices operate on bit streams, whose
probabilities (% of bits equal to 1 in the stream) are related to the values of the operands. There
is an intrinsic approximation error in the conversion, which decreases as the number of bits in the
stream increases, and can be regarded as noise.
1001000100001011
1000100110011010
1000000100001010
Stochastic Multiplier Circuit
 the precision of the output stream
generated by the multiplier depends
heavily on the stream length
S
S11
 short streams (with few samples)
111111111111111111111111111111111110000000...0000 (35 1s)
01100010101
010111011001
S
S22
did not produce precise results
sum
sum
0010100110101
S
S33
 this operator has been used to
111111111111111111111010101010101010000000...0000 (28 1s)
01010101101
implement a FIR filter (see figures
Stochastic Adder Circuit
111111111111111111110000000000000000000000...0000 (21 1s)
% Errors in 1,000 additions
Conventional
0.0000
0 faults
0.1412
Stochastic
2 faults
4 faults
0.2580
0.1768
bellow) and, for this specific
application, did not produce enough
2 x count of 1s in the output = 56
8 faults
0.2196
precision
Stochastic Adder Operation with pS3 = 0.5
Comments
 Despite the low speed obtained in the simulation of a FIR Filter using the
stochastic adder and multiplier, we believe that the use of signal
redundancy may lead to other interesting approaches
 Also, the idea of taking component variability into account during design
may succeed, once the adequate granularity to apply this approach is
reached
 In order to confirm those assumptions, new experiments are being
developed in our research group
8,192 samples
1,048,576 samples
Output of FIR Filter Using Stochastic Operators
(1) Lisbôa, C. and Carro, L., “An Intrinsically Robust Technique for Fault Tolerance under Multiple Upsets ”, in Proceedings of the 10th IEEE
International Online Test Symposium - IOLTS 2004, pp. 180, IEEE Computer Society, New York, July 2004.
Universidade Federal do Rio Grande do Sul - UFRGS
Instituto de Informática, Pós-Graduação em Ciência da Computação
Grupo de Microeletrônica (GME)
Laboratório de Sistemas Embarcados (LSE)
http://www.inf.ufrgs.br/gme, http://www.inf.ufrgs.br/~lse
Porto Alegre - RS
BRAZIL
Phone
+55 51 33166155
e-mail
[email protected]
[email protected]
[email protected]