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Transcript Single Event Upset Origin 0 1 0 1 1 1 1 0 1 1 0 1 1 1 1 0 1 0 1 0 0 0 0 1
Dealing with Multiple Simultaneous Faults in Future Technologies
Carlos Arthur Lang Lisbôa, Luigi Carro
DATE 2006 - EDAA PhD Forum
INFORMÁTICA
Future technologies, bellow 90nm, will present transistors so small that they will be heavily influenced by electromagnetic
noise and SEU induced errors. Since many soft errors might occur at the same time, a new design approach must be taken.
Single Event Upset Origin
Motivation
10100001
• propagation delays will be shorter than transient pulses duration
• smaller transistors will be more sensitive to electromagnetic noise and neutron and alpha particles
• industry experts believe that the probability of more than two simultaneous faults is neglectable
• the classic Triple Modular Redundancy approach can not withstand more than one fault at a time
Using Stochastic Operators(1)
Due to the random nature of SEU induced transient errors, stochastic operators have been chosen to
implement one adder and one multiplier that could withstand multiple soft errors. Instead of adding or
multiplying binary coded values, those devices operate on bit streams, whose probabilities (% of bits equal
to 1 in the stream) are related to the values of the operands. There is an intrinsic approximation error in the
conversion, which decreases as the number of bits in the stream increases, and can be regarded as noise.
Output of FIR Filter Using
the Stochastic Operators
01100010101
8,192 samples
010111011001
S2
1001000100001011
Sum
S3
1000000100001010
1000100110011010
0010100110101
01010101101
% Errors in 1,000 additions
the precision of the output stream generated by the multiplier depends
heavily on the stream length
Conventional
Stochastic
no faults
0 faults 2 faults 4 faults 8 faults
0.0000
0.1412 0.2580 0.1768 0.2196
short streams (with few samples) did not produce precise results
these operators have been used to implement a FIR filter (see figures)
and, for this specific application, did not produce enough precision
Using Bit Stream Operators(2, 3, 4)
Basic Concepts
Bit Stream Representation of Products
the multiplier generates a
bit stream in which the
number of bits equal to 1 is
the value of the product
adding signal redundancy
to this bit stream, tolerance
to multiple bit flips in the
stream is achieved
the stream is tolerant to a
“balance” of flips which
depends on the
redundancy added to the
stream (see Table 1)
11011110
Comments
Despite the low speed obtained in the
simulation of a FIR Filter using the
stochastic operators, we believe that
the use of signal redundancy may
lead to other interesting approaches
Stochastic Multiplier Circuit
Stochastic Adder Circuit
S1
01011110
F12
F22
F20.F12
F21.F11
F22.F10
F11
F21
F20.F11
F21.F10
b48 .. b33 b32 .. b17 b16 .. b5
b4 .. b1
x
F22.F12
F21.F12
F22.F11
In order to confirm those assumptions,
new experiments are being developed
in our research group
The Analog Voter (5)
The Problem
In TMR based systems, the voter is a critical component, because:
• a single fault in the voter circuit may propagate to the output
• two or more simultaneous faults in the voter circuit may lead to erroneous voting output
F10
F20
F20.F10
Proposed Solution
b0
Fig. 1 – Proposed Multiplication Algorithm - bit stream product
(the count of 1’s in the stream is equal to the product value)
b48 .. b48 b47 .. b47 ... b0 .. b0 1 1 1 1 0 0 0
8 times
1,048,576 samples
Also, the idea of taking component
variability into account during design
may succeed, once the adequate
granularity to apply this approach is
reached
8 times
8 times
total count of 1’s = 8 * product + 4
Using some knowledge from the analog field, replace the digital voter with an analog comparator, since:
• analog design has been dealing with noise problems for many years
• transient events effects can be regarded as noise
• injection of transient faults can be simulated using current sources
Extending the solution for n-MR
+4
Fig. 2 – Adding robustness to the bit stream through redundancy
Comments
the exact sum of values represented by bit streams can be obtained simply by
concatenating the streams corresponding to the values of the summands
as long as the values are kept as streams, they are protected against faults
Sample 8-bit Stream Multiplier (RobOp)
a
5-tap Filter using RobOps
Simulation Results: (a) multiple faults injection, (b) Montecarlo parameter variation
Vdd
b
7.0 6.0 5.0 4.0 3.0 2.0 1.0 0.0
(a)
7.1 6.1 5.1 4.1 3.1 2.1 1.1 0.1
a.b a.b a.b a.b a.b a.b a.b a.b 1 1 1 1
(b)
7.2 6.2 5.2 4.2 3.2 2.2 1.2 0.2
7.3 6.3 5.3 4.3 3.3 2.3 1.3 0.3
cctr
7.4 6.4 5.4 4.4 3.4 2.4 1.4 0.4
7.5 6.5 5.5 4.5 3.5 2.5 1.5 0.5
cctr
cctr
cctr
cctr
cctr
cctr
cctr
cctr
cctr
cctr
cctr
cctr
cctr
cctr
12
7.6 6.6 5.6 4.6 3.6 2.6 1.6 0.6
converter
7.7 6.7 5.7 4.7 3.7 2.7 1.7 0.7
Conclusions
Injection of Faults
the main drawback of this approach is that the size of the bit streams grows very fast,
but this should be ok for SET, for example
further research is being conducted in order to develop circuits to convert the streams
into binary values with tolerance to multiple simultaneous faults
in the Analog Voter
Research Plan
Logic
Properties
Stochastic
Operators
Bit Stream
Operators
Double
Fault
Tolerance
Analog
Voter
DSP /
VLIW
Reconfig.
Logic
previous work (2004-2005)
2006
2007
During Test
(1) Lisbôa, C. and Carro, L., “An Intrinsically Robust Technique for Fault Tolerance under Multiple Upsets ”, in Proceedings of the 10th
IEEE International Online Test Symposium - IOLTS 2004, pp. 180, IEEE Computer Society, New York, July 2004.
(2) Lisbôa, C. and Carro, L., “Arithmetic Operators Robust to Multiple Simultaneous Upsets”, in Proceedings of the 19th IEEE
International Symposium on Defect and Fault Tolerance in VLSI Systems - DFT 2004, pp. 289-297, ISBN 0-7695-2241-6. IEEE
Computer Society, New York, October 2004.
(3) Lisbôa, C. and Carro, L., “Highly Reliable Arithmetic Multipliers for Future Technologies”, in Proceedings of the International
Workshop on Dependable Embedded Systems - WDES 2004 - in conjunction with the 23rd International Symposium on Reliable
Distributed Systems - SRDS 2004, pp. 13-18. Edited by Becker, L. B. and Kaiser, J., Florianópolis, October 17, 2004.
(4) Lisbôa, C., Carro, L., and Cota, E. “RobOps – Arithmetic Operators for Future Technologies”, in Informal Proceedings of the 10th
IEEE European Test Symposium (ETS 05), Tallinn, Estonia, May 2005.
(5) Lisbôa, C., Schüler, E. and Carro, L., “Going Beyond TMR for Protection Against Multiple Faults”, in Proceedings of the 18th
Annual Symposium on Integrated Circuits and System Design, pp 80-85, 2005, Florianópolis, Brazil, September 04 - 07, 2005,
ISBN:1-59593-174-0, ACM Press, New York, NY, USA, 2005.
Universidade Federal do Rio Grande do Sul - UFRGS
Instituto de Informática, Pós-Graduação em Ciência da Computação
Grupo de Microeletrônica (GME) - Laboratório de Sistemas Embarcados (LSE)
http://www.inf.ufrgs.br/gme, http://www.inf.ufrgs.br/~lse
Porto Alegre - RS
BRAZIL
Phone
+55 51 33166155
e-mail
[email protected]
[email protected]