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CDA 4630/5636: Embedded Systems
 Introduction
 Course Requirements
 Grading Criteria
 Course Policies
 Textbook
 Embedded Systems Basics
 Course Outline
CDA 4630/CDA 5636 – Spring 2016
Copyright © 2016 Prabhat Mishra
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Instructor: Dr. Prabhat Mishra
Associate Professor, CISE

http://www.cise.ufl.edu/~prabhat

Room: CSE 568

Email: [email protected]

Phone: 352 505 1880

Office hours: Wednesday 1:55 – 3:50 PM
 Brief History
Since
2004 at University of Florida.
Held positions in Texas Instruments, Intel,
Motorola (Freescale), Synopsys, and …
Published four books, 100+ research articles, …
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Teaching Assistant
Youlin Zhang
2nd year Ph.D. Student
 http://www.cise.ufl.edu/~youlin
 Room: CSE 309
 Email: [email protected]
 Office hours: Tue 1:55 – 3:50 PM

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Teaching Assistant
Gokhan Kaya
6th year Ph.D. Student
 http://www.cise.ufl.edu/~gkaya
 Room: CSE 309
 Email: [email protected]

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Embedded Systems
 Two types of computing
– produced millions/year
 Embedded – billions/year
 Desktop
 Non-Embedded Systems
 PCs,
servers, and notebooks
 Embedded Systems – the future of computing!
 Automobiles, entertainment, communication, aviation,
handheld devices, medical, ….
Embedded Systems
Automobiles
Medical
Entertainment
Handheld
Airplanes
Military
Why should I take this course?
To understand a new area

Intersection of architecture, OS and compilers
 Includes software and hardware (digital + analog)
 Covers a wide variety of optimization objectives
 area, power, performance, energy, temperature
Analog/Digital
Architecture
Compiler
OS
Subject Areas
Hardware
Software
Domains
Embedded
Real-Time
Reconfigurable
Computing Paradigms
To pursue research in this field
Interdisciplinary – many job openings …
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Lectures
Course Page


http://www.cise.ufl.edu/class/cda5636sp15/
Visit regularly for updates and announcements
Lectures

Mon, Wed and Fri 10:40 – 11:30 AM
NEB 102
Class participation – 5% of overall score

On campus students are expected to attend
classes and actively participate in discussions.
Please be on time
eLearning website will be used for assignments

https://lss.at.ufl.edu
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Course Requirements
 No graduate levels courses necessary
 Required Courses

CDA 3101 - Computer Organization

Good programming knowledge in C, C++ or Java

Necessary to do well in the course projects
 Each project can be approximately 500 lines of
code. Therefore, you should be comfortable
designing and debugging large programs.
Please check with the instructor if you do not
have the required pre-requisites
When to consider dropping it?
Subjective tests

You are not interested in learning!

Like to collaborate in individual assignments!

You do not have the required background
 Courses: computer organization and programming

The name “software” or “hardware” scares you

Need a specific grade in this course to graduate
but not willing to put the required effort
Objective test
Do
not score at least 50% in the test (will be
provided)
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Grading Criteria
 Homeworks – 15%

Two HWs for CDA4630 and three for CDA5636
 Projects – 20%

Two projects for CDA4630 and three for CDA5636
 Two Exams

Midterm – 25%

Comprehensive Final – 35%
 Participation – 5%
Grading will be on the curve
Separate
curves for CDA 4630 and CDA 5636
 top 15-20%  A, next 15-20%  A-, …
How do I get an “A” grade?
Make sure you are in top 15-20% (overall 90+)
How to be in top 15-20% ?
 Make
sure you have the required background
 Attend
every lecture and actively participate in discussions
 Come
prepared for the next lecture
 Make sure you understood the previous lectures completely
 Use
both TA and instructor office hours effectively
 Use office hour for technical discussions (not for “re-grading only”)
 Solve
homeworks and projects on your own
Another perspective:
Lectures + HWs + Projects
BB
Read Materials + Understand Examples
B+
A-
Discussions+ …
A
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Course Policies
No grades for late submissions.
Complete homeworks/projects on your own.
“Zero
Tolerance” policy towards cheating
Exams are closed book/notes.
Crib
sheet allowed -- hand-written notes
Calculator
(cell phone not allowed)
Re-grading requests within a week.
 One
week from when it is available (posted in eLearning).
Attendance, Cell Phones, …
http://www.cise.ufl.edu/class/cda5636sp16/
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Tentative Schedule
Assigned
Homework 1:
Project 1:
Homework 2:
Midterm:
 EDGE
Jan 27
Feb 03
Feb 17
Mar 14
Due
Feb 03 (11:30 PM)
Feb 17 (11:30 PM)
Feb 24 (11:30 PM)
10:40 – 11:30 PM in NEB 102
students can take the midterm between Mar 23 – 24
Homework 3:
Project 2:
Project 3:
Final:
Feb 24
Mar 09
Mar 30
Apr 28
Mar 09 (11:30 PM)
Mar 30 (11:30 PM)
Apr 13 (11:30 PM)
12:30 – 2:30 PM in NEB 102
students can take the final between Apr 28 – 29 so
that exam reaches the instructor by Apr 30, 4:00 PM (EST)14
 EDGE
Textbook
 No required textbooks
 Materials will be from various books (approx. coverage )
 P. Marwedel, Embedded System Design (40%)
 W. Wolf, High Performance Embedded Computing (15%)
 F. Vahid and T. Givargis, Embedded System Design (10%)
 M. Chen …, System-Level Validation, (10%)
 W. Wang …, Dynamic Reconfiguration in Real-Time Systems (10%)
 Various sources (15%)

If you want to buy, try one of the first two books
 References
 Conferences/Journals
 DAC, ICCAD, …, ACM TODAES/TECS, IEEE TCAD/TVLSI

Web Resources: www.embedded.com, www.eet.com, …
Motivation
 Examples
 Block Diagram
 Characteristics
 Major Challenges

Low Power

Design Complexity

Verification Complexity

Time-to-Market

Security and Reliability
 Design Automation Opportunities
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Example: Digital Camera
Components of Embedded Systems
Memory
Controllers
Interface
Software
(Application Programs)
Coprocessors
Processor
ASIC
Converters
Analog
Digital
Analog
Components of Embedded Systems
 Analog Components

Sensors, Actuators, …
 Digital Components

Processor, Coprocessors, Memories, Buses

Controllers, Application Specific Hardwares
 Converters

Analog-to-Digital (A2D), D2A, …
 Software

Operating systems

Middleware

Applications (MPEG-x, GSM-kernel, …)
Example: BMW 745i
 2, 000, 000 LOC
 Windows CE OS
 53 8-bit P
 11 32-bit P
 7 16-bit P
 Multiple Networks
 Buggy!
Electronic Devices in Automobiles
Lee [Lee02b] © 2002 IEEE
© 2006 Elsevier
Motivation
 Examples
 Block Diagram
 Characteristics
 Major Challenges

Low Power

Design Complexity

Verification Complexity

Time-to-Market

Security and Reliability
 Design Automation Opportunities
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Simplified Block Diagram
Display
Analog  Digital
Converter
Embedded Computing
(Processors, Memories, …)
Digital  Analog
Converter
Actuators
Sensors
Environment
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Motivation
 Examples
 Block Diagram
 Characteristics
 Major Challenges

Low Power

Design Complexity

Verification Complexity

Time-to-Market

Security and Reliability
 Design Automation Opportunities
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Characteristics
 Application Specific

Applications are known a priori
 Optimize for cost, area, power, and performance
 Digital Signal Processing

Signals are represented digitally
 Reactive

Reacts to changes in the system’s environment
 Real-time

Compute certain tasks before deadline
 Distributed, Networked, …
Characteristics
 Reliability

Probability of system working correctly provided
that is was working at t=0
 Maintainability

Probability of system working correctly d time
units after error occurred.
 Safety

Not harmful for user
 Security

Confidential and authentic communication
Traditional Design Challenges
 Low cost
 Digital/analog requirements
 Light weight
 Shrinking time-to-market
 Reliability
 Short product lifetime
 Low power
 Real-time processing
 Portable
 Inherent concurrency
 Complexity
 HW/SW co-design
 Ease of use
 Network friendly
 Security
 Reliability
Motivation
 Examples
 Block Diagram
 Characteristics
 Major Challenges

Low Power

Design Complexity

Verification Complexity

Time-to-Market

Security and Reliability
 Design Automation Opportunities
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Reducing Energy Consumption
Pentium
Running the same multimedia application.
Crusoe
[www.transmeta.com]
Infrared Cameras (FLIR) can be used to detect thermal distribution.
Motivation
 Examples
 Block Diagram
 Characteristics
 Major Challenges

Low Power

Design Complexity

Verification Complexity

Time-to-Market

Security and Reliability
 Design Automation Opportunities
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Design Complexity
Exponential Growth – doubling of transistors every couple of years
Design Complexity
1,000,000,000
Sony Graphic Synthesizer
IBM Power4
NVIDIA NV30 GPU
NVIDIA NV25 GPU
Sony Graphic Synthesizer
IntelPentium 4
IntelPentium III
100,000,000
Number of Transistors
NVIDIA NV40
10,000,000
IntelPentium II
IntelPentium
Intel486
1,000,000
Intel386
Intel286
100,000
Intel8086
NVIDIA NV20 GPU
Motorola G4
AMD Athlon XP
Intel Centrino
NVIDIA NV35 GPU
ATI Radeon X800
10,000
Intel8080
1000
Intel
4004
Intel8008
1970
1975
1980
1985
1990 1995
2000
2005
Use of Silicon Power
Technology and Demand
#of transistors are doubling every 2 years
Technology
Demand
Communication, multimedia, entertainment, networking
Exponential growth of design complexity
verification complexity
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Who wants to be a Millionaire
 You double your investment everyday


Starting investment - one cent.
How long it takes to become a millionaire
a)
b)
c)
d)
e)
20 days
27 days
37 days
365 days
Lifetime ++
Who wants to be a Millionaire
 You double your investment everyday


Starting investment - one cent.
How long it takes to become a millionaire
a)
b)
c)
20 days
27 days
37 days
One million cents
Millionaire
Billionaire
 Doubling transistors every 18 months

This growth rate is hard to imagine, most people
underestimate
 Believe it or not

Each of us have more than a million ancestors in
last 20 generations.
Motivation
 Examples
 Block Diagram
 Characteristics
 Major Challenges

Low Power

Design Complexity

Verification Complexity

Time-to-Market

Security and Reliability
 Design Automation Opportunities
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North America Re-spin Statistics
1st Silicon Success
100%
48%
1999
44%
2002
39%
2004
Source: 2002 Collett International Research and Synopsys
North America Re-spin Statistics
1st Silicon Success
100%
48%
1999
44%
2002
39%
2004
Source: 2002 Collett International Research and Synopsys
71% SOC re-spins are due to logic bugs
Functional Validation of SOC Designs
2014
Trillions
2000
2007
1000B
200
2001
10B
20
1995
100M
1M
10M
Logic Gates
Source: Synopsys
100M
Billions
Simulation Vectors
Engineer Years
20000?
Motivation
 Examples
 Block Diagram
 Characteristics
 Major Challenges

Low Power

Design Complexity

Verification Complexity

Time-to-Market

Security and Reliability
 Design Automation Opportunities
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Time-to-Market
 Time required to develop a
product to the point it can be
sold to customers
Revenues ($)
 Market window
 Period
during which the product
would have highest sales
Time (months)
 Average time-to-market
constraint is about 8 months
 Delays can be costly
Losses due to Delayed Market Entry
 Simplified revenue model
 Product
life = 2W, peak at W
 Revenue = area of the triangle
 Loss = difference between on-time and delayed triangle
areas (shaded region)
 Area = 1/2 * base * height

Revenues ($)
Peak revenue
Peak revenue from
delayed entry
On-time
Market fall
Market rise
Delayed

 Percentage revenue loss =
(D(3W-D)/2W2)*100%
 Try some examples
1.
D
On-time
entry
Delayed
entry
On-time = 1/2 * 2W * W
Delayed = 1/2 * (2W-D)*(W-D)
W
2W
Time
2.
Lifetime 2W=52 wks, delay D=4 wks
Loss = (4*(3*26 –4)/2*262) = 22%
Lifetime 2W=52 wks, delay D=10 wks
Loss = (10*(3*26 –10)/2*262) = 50%
Design Productivity Gap
10,000
100,000
1,000
10,000
Logic transistors 100
10
per chip
(in millions)
1
1000
Gap
IC capacity
10
0.1
0.01
100
Productivity
(K) Trans./Staff-Mo.
1
Productivity
0.001
0.1
0.01
 1981 leading edge chip required 100 man-months
 10,000
transistors / 100 transistors/month
 2002 leading edge chip requires 30K man-months
 150,000,000
/ 5000 transistors/month
 Designer cost increase from $1M to $300M
Mythical Man-Month
 In theory, adding designers to team reduces project
completion time
 In reality, productivity per designer decreases due to team
management complexity and communication overhead
 In the software community, known as “the mythical manmonth” (Brooks 1975)
 At some point, can actually lengthen project completion time!
 1M transistors, one
designer=5000 trans/month
 Each additional designer
reduces for 100 trans/month
 So 2 designers produce 4900
trans/month each
60000
50000
40000
30000
20000
10000
16
15
Team
16
19
18
23
24
Months until completion
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Individual
0
10
20
30
Number of designers
40
Motivation
 Examples
 Block Diagram
 Characteristics
 Major Challenges

Low Power

Design Complexity

Verification Complexity

Time-to-Market

Security and Reliability
 Design Automation Opportunities
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Attacks on Embedded Systems
Remote Software Attacks
(Worm, Virus, Trojans)
Promity-based Passive Hardware Attacks
(Power or EM analysis)
Irreversible Hardware Attacks
(Tampering)
Turbo Code
AES
Reversible Active
Proximity-based Attacks
(Fault injection)
uP
RAM
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Security and Reliability
 Reliable system design creates systems that work
even in the face of internal or external errors.
 Design
errors, manufacturing defects, radiation hazards, …
 To ensure security, countermeasures are required for
various types of malicious attacks.

power attack, network attack, trojans, virus, …
 Safety-critical systems need to dynamically detect
errors or security attacks and repair/mitigate them.
Avizienis et al. [Avi04]
© 2006 Elsevier
Challenges versus Trade-offs
 Multicore architectures ensures performance growth
without creating power disaster
 One
core with frequency 2 GHz
 Two cores with 1 GHz frequency (each)
 Same performance
 Two 1 GHz cores require half power/energy
– Power  freq2
– 1GHz core needs one-fourth power compared to 2GHz core.
 Creates
reliability concerns!
 Assume that one core has mean-time-to-failure (MTTF) of 5 years
 a system with 64 cores has MTTF approximately one month!
 Design complexity and reduced time-to-market needs
integration of components from other companies.
 Creates opportunity for malicious attacks
Motivation
 Examples
 Block Diagram
 Characteristics
 Major Challenges

Low Power

Design Complexity

Verification Complexity

Time-to-Market

Security and Reliability
 Course Outline
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Course Overview
Hardware Components
Hardware
Concept
Specification
HW/SW
Partitioning
Estimation Exploration
Software
Software Components
Validation and Evaluation
Course Outline
Introduction
Modeling and Specification
Embedded Systems Architecture
Real-Time Scheduling and OS
Compilation for Embedded Applications
Hardware-Software Co-Design
Control Systems
Recent Research Directions
Code
compression, design space exploration,
functional verification, dynamic reconfiguration
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