Transcript ppt - INFN - Sezione di Padova

The ALICE Silicon Pixel Detector
A barrel of two layers of Silicon Pixel Detectors (SPD) constitutes the
innermost part of the Inner Tracking System of ALICE, an experiment
on ultra-relativistic heavy-ion collisions at CERN LHC.
SPD will have to track particles in a high multiplicity environment close
to the interaction point; being SPD fundamental in determining the quality
of the vertexing capability of ALICE, high precision and granularity are
necessary requirements for the detector.
The basic building block of the ALICE SPD is the ladder, consisting of a pixel
silicon detector matrix of 256  160 cells, each measuring 50 m in the r
direction and 425 m in the z direction parallel to the beam pipe; the ladder
Cross section of the SPD barrel. The detectors
measures 13.9 mm (r)  70.7 mm (z).
are distributed in 2 layers of 20 and 40 staves
Five front-end chips, each containing the electronics for the readout of a
respectively, mounted on 10 carbon fiber
sub-matrix of 256 (r)  32 (z) detector cells, are flip-chip bonded to the ladder.
support sectors, 200 m thick.
Four ladders are aligned in the z direction to form a stave.
50m
425m
Six staves, two for the inner layer and four for the outer layer, are mounted on
FRONT-END CHIP
a carbon fiber support and cooling sector. The staves of the inner (outer) SPD
layer are located at an average distance of 4 cm (7 cm) from the beam axis.
Ten such sectors are mounted together around the beam pipe to close the barrel.
In total, there are 60 staves, 240 ladders, 9.8 M pixel cells.
Carbon fiber sector with 4 staves of the
outer detector layer. The sector is equipped
with cooling squeezed ducts running under
the staves. Fluorocarbon is used as coolant
fluid. A power dissipation of about 0.2 kW
2 ladders are glued and wire-bonded on a multi-layer thin carrier (half stave)
which contains the bus and power lines. One Pilot Chip located at the extremity
of the half stave performs the readout and control functions and transmits the
binary data from the pixel cells to a remote Router.
Schematic of the electronics readout circuit in each pixel cell.
The front-end chip is fabricated in a commercial 0.25µm CMOS
technology and transistors are designed with a radiation-tolerant
geometry.
is foreseen for each sector.
The flip-flops of each pixel cell in the same column are
connected to form a shift-register; the 32 columns are
read out in parallel, using 10 MHz clock frequency.
Photograph of two carbon fiber sector
prototypes (left) and of a sector fully
equipped with cooling system for tests.
The data from the addressed de-randomizing buffer (FIFO)
are shifted out of the front-end chip into the Pilot Chip and
serialized for transmission over an optical fiber link to the
Router Module, located outside the ALICE detector. Two
other optical links connect at lower speed the Pilot Chip to
the Router to supply the control and trigger information.
The 6 half staves of the same sector side are connected
with the same Router Module by 18 optical links.
Gianfranco Segato
Dipartimento di Fisica
Università di Padova and INFN
for the ALICE Collaboration