Rad-Effect-01-09-15 - The University of Sydney

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Transcript Rad-Effect-01-09-15 - The University of Sydney

RADIATION EFFECTS ON
SPACE MICROELECTRONICS
COSMIC RAY TYPES
Cosmic Ray Air Shower
(a)
(b)
(c)
(d)
(e)
(f)
Produced in upper atmosphere
A myriad of elementary particles
Cherenkov light, Air glow
Affects Airline pilots, Balloon flyers
Detrimental to radio communication
Long range: Mountain top to sea bed
Astronauts during inter or extra planetory
travels (in very near future) and long term
habitants in space stations are affected by
GCR. Radiation shielding for both astronauts
and microelectronic based instruments and
control systems becomes vitally important.
Galactic Cosmic Rays GCR)
(a) Extra galactic origin
(b) Omni directional
(c) Shielded by earth magnetic field
(d) Source: H and He ions (most abundant in universe) to very high energy.
Radiations from High-Energy Particle Accelerators
(Cosmic Ray Shower Paradigm)
Atmospheric Depth

Shield Thickness
Radiation Protection and Safety Culture for Astronauts
NOTE
In EU member countries Pilots and Flight
attendants of civil airlines already catagorised
as „Radiation workers“, manadatory to carry
personal radiation dosimeters (TLD badges)*.
*Bhaskar Mukherjee, Peter Cross and Roger Alsop, Measurement of the neutron and gamma doses
accumulated during commercial jet flights from Sydney to several destinations in the northern and
southern hemispheres. Radiation Protection Dosimetry 100(2002)515-518
Radiation shielding and Space radiation dosimeters
Asssortment of dosimeters used by Mir
and ISS astronauts during 1990-2000.
Cosmonauts during daily work in Mir
space station. Area dosimeters are
attached to the internal wall of the cabin,
A typical example of space
radiation shielding. A 250 mil (6.35
mm) thick aluminium plate found to
be optimal.
The annual limit of occupational radiation exposure
to astronauts is 50 mSv, whereas the limit for
terrestrial radiation workers endorsed to be 20 mSv.
Discovery of the van Allen Belt
In 1958 Explorer 1*, the 1st US Satellite
mapped the charged particle radiation field
around the earth, the van Allen Belt
Professor Dr. James van Allen
William Pickering, James van
Allen and Wernher von Braun with
the replica of Explorer 1
* Explorer 1 (JPL, California) was in fact, the 1st
space borne GEIGER COUNTER fully based on
recently invented transistors
The Space Environment : van Allen Belts
The Morphology of Space Environment
a)
b)
c)
d)
e)
Geomagnetic fields
Solar storm
Space weather
Aurora Boreales/Aurora Australis
Galactic Cosmic Rays
Detail Structure of the Van Allen Belt
a) Inner Belt => Protons dominate
Operation zone => Low Earth Orbiting
(LEO) Satellites, ISS
b) Outer Belt => Electrons dominate
Operation zone => Geo Stationary
Satellites, Communications Satellies
Total accumulated dose depends on Orbit altitude, Orientation and Time
Commercial Off The Shelf
COTS ?
are far more cost effective than radiation hardend
(„military grade“) electronic components
Radiation Effects on Electronics: Summary
Single Event Upsets (SEU), also known as Soft Errors is non-detrimental, however,
could severely interrupt the flawless function of microelectronics.
Types of Radiation induced Damage
Total Ionising Dose (TID) damage
Agent: Photons
Main Symptom: Irriversible failure
Vulnerability: all types of (opto) electronic components
Displacement or Non-Ionising-Energy-Loss (NIEL) damage
Agent: Neutrons, Protons and Heavy charged particcles (HCP)
Main Symptom: Irriversible failure
Vulnerability: all types of (opto) electronic components
Single Event Upset (SEU) or Soft Error
Agent: Neutrons, Protons and Heavy charged particcles (HCP)
Main Symptom: Temporary function inturruption
Vulnerability: mainly electronic memory chips driving FPGA, CPU and Microcontroller etc.
Characteristics: function revival by „switching on/off „ procedure
Note: disussed in details in next slide
SEU in Static Random Access Memory (SRAM)
Mechanisms of Triggering a SEU
In a microelectronic circuit (M), embedded in the semiconductor substrate (S) a Single
Event Upset (SEU) set off when the interacting ionising particle deposits sufficient energy in
the sensitive volume enclosing the critical node (N). The SEU triggering mechanism could
be divided in two broad categories:
(a) Direct Interaction
The high energy heavy (HZE)
particle, i.e. of cosmic origin (P) directly
interact with the critical node (N) by
producing a track of electron/hole pairs,
thereby causing the SEU.
(b) Indirect Interaction
The primary particle, i.e. accelerator produced neutron undergo
nuclear reaction with the primary atom (A) producing primary
knockout atom (PKA) and secondary charged
particle (CP), causing the SEU.
Radiation Effects Mitagation Strategies
Total Ionising Dose (TID) damage and Displacement damage (NIEL)
Optimised Lead or Concrete shielding for Gamma rays
Borated Polyethylene or Borated Concrete for Neutrons
Single Event Upset (SEU) in Memory Chips (SRAM and Flash Memories)
(a) Software based: Triple Mode Redundancy (TMR), Humming Code => SLOW (time lag)
(b) Hardware based: Thin composite-material neutron shielding =>FAST (instanteneous)
(c) Combination of Hardware and Software =>MOST RELIABLE
Incidance of SEU could have severe implications
(a) Power supplies (FPGA controlled) operating in radiation environement of High-Energy
Accelerators => SEU induced faults in FPGA could cause fire due to malfunction of the P Suppy
(b) Patients with heart-pace makers (driven by very high density micro-chips) under going
particle therapy, generating a copious secondary neutrons => SEU induced faults could stop the
pace maker. Even a short interruption may result in patients heart failure.
(c) LEO Micro-Satellite instruemntaion system (controlled by FPGA based on fast SRAM chips),
neutrons are produced by the interaction of protons with the satellite body => SEU induced fault
may abruptly terminate the mission
Electronics in Radiation Environment: Summary
Semiconductors are highly
susceptable to radiation.
Instrumentation and control devices
of modern particle accelerators are
solely based on microelectronics.
Highlighting the radiation damage threshold
(neutrons.cm-2) of 1 MeV equivalent neutrons
relevant to selected electronic components.
Reference
F. Wulf, A. Boden, D. Bräunig, GfW Hand-book for Data
Compilation
of
irradiation
tested
electronic
components. HMI Report B-353, TN 53/08, Vol. 1-6
MITIGATION TECHNIQUES
Implementation of Shielding
(a) Water/Polyethylene (b) Borated Rubber
(c) Borated Heavy concrete (d) Lead
Testing of Microelectronic Memories and CCD Cameras
We have irradiated the following microelectronic devices
(1) Commercially available SRAM chips of 256, 512, 1024 and 2048 kB
memory density (s. Table below)
(2) Two miniature CCD Cameras
Radiation Source and Shielding Type
(1) Un-moderated neutrons from a 241Am/Be source
(2) Neutrons moderated with 6.9 cm H2O layer
(3) Moderated neutrons (as above), Electronics shielded with
3.5 mm thick Boron Rubber
Specifications of the SRAM
(Static Random Access
Memory) Chips used in this
Investigation.
Test Results
Number of SEU in 512 kB SRAM Chips induced
by neutrons for three exposure modes.
Neutron induced SEU in CCD
Cameras for two exposure modes.
Results showing the neutron
irradiation effects in SRAM
chips of four different
memory densities.
Boronated Rubber => Best Performance
Hydrogenous shield (Polyethylene, Water) without Boron => Worst Performance
Radiation Shielding for Power Control Devices
Based on radiation sensitive SRAM (Static Random Access Memory) chips
Power Control Crete
Shielded FPGA
15mm Lead +
6mm Boronated
Rubber
Test-location under
Acclerator Module
Unshielded
FPGA
Power Control Card
Shielding Efficacy was
estimated by the ratio
of TLGC areas
CPU / SRAM
Gamma:
Ag(in)/Ag(out) = 0.09
TL-Glow Curves of TLD-600 chips:
1st. Chip inside, 2nd. Chip outside
Thermal Neutron:
An(in)/An(out) = 0.01
Both Cards were interfaced to DAC system and continuously monitored over 7 months
Unshielded Card: 2 SEU (Single Event Upset) recorded in every week
Shielded Card: No SEU was recorded in 7 months
Radiation Effects in Electronic Components and Mitigation
provided by dedicated Shieldings
Shielding: 20 cm Heavy Concrete
=> Dose reduction factor: 0.019
Photon
Neutrons
(as) lies above the gamma toleration threhold, hence, additional 5mm Pb to be added
Neutron Irradiation Set up for COTS Microelectronics
Water moderated 241Am/Be Neutrons
B: Thermal Neutron Shield (Borated Polyethylene)
D: Device under Test (DUT)
H: Table
J1, J2: Jars (16 and 33 cm radius respectively)
P: Stand
S: 241Am-Be Neutron source
T: Tripod (Source holder)
Photograph of the neutron Irradiation device
showing diverse types of DUT (Device
Under Test), in particular power control
boards and Memory chips (SRAM) under
irradiation.
Characteristics of the Neutron Test-Exposure Field
The Reference Neutron Spectra
(a) Un-moderated, En (av) = 5.2 MeV
(b) Moderated (6.9 cm H2O), En (av) = 4.1 MeV
(c) Moderated (15.9 cm H2O), En (av) = 3.2 MeV
The total areas of the bins (a), (b) and (c)
are normalised to unity.
Reference
B. Mukherjee: Development of a simple neutron
irradiation facility with variable average energy using a
light water moderated 241Am/Be source. Nucl. Instr.
Meth. A 363(1995)616-618
Legend
Tmod = Moderator (H2O) Thickness
SDD = Source to Detector Distance
Hnm = Measured Neutron Dose Equiv.
Hnc = Calculated Neutron Dose Equiv.
Hgm = Measured Gamma Dose Equiv.
*With thermal neutron shield
A Digital Signal Processing Board (COTS)
under Gamma Irradiation
A medium activity 60Co point gamma source was
placed behind the FPGA Chip
(FPGA = Free Programmable Gate Array)
SUMMARY AND CONCLUSION
Types of important radiation induced detrimental effects on
electronics (SRAM chips and CCD camera) explained
Implementation of various mitigation strategies relevant to
biomedical and space electronics discussed
Development and application of variable energy radiation delivery
devices for testing of microelectronics are highlighted
These devices are based on isotopic neutrons from a
source and a 235 MeV proton therapy medical cyclotron
241Am/Be
The application of a Isotope Poduction Medical (proton) Cyclotron
for radiation hardness testing microelectronics is proposed.
Thank you all for your Attention
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Questions ??