Transcript RADECS_2010_Highlights_ix

RADECS 2010 Highlights
20-24 September
link to program
Giovanni Spiezia, Daniel Kramer
Session A – basic mechanisms
• NIEL scaling: comparison with measured defect
introduction rate in silicon
– Better understanding of the simulation models (i.e. many
body interactions to be used at low E)
• P-channel Power MOSFET SEGR sensitivity to Heavy
Ion Range
– Worst sensitivity if Bragg peak close to EPItaxial layer and
substrate
– More than 500 MOSFETS tested! Stress test if no SEGR
Session B – devices & integrated circuits
• B1 Verilog-A Modeling of Radiation-Induced
Mismatch Enhancement
– TID effects implemented in VerilogA, TID can imbalance the circuit
• B3 Performance and TID Radiation Response of a
Diamond Vacuum Lateral Field Emission Transistor
– Diamond transistor like vacuum tube is inherently Rad HARD (will not
like B field)
– Tested up to 4.4e13cm-2 and 200kGy -> no changes seen
• PB2
– floating gate PMOS with cycled bias used as dosimeter – very linear
response
Session C – SEEs: mechanisms & modeling
• C2 Heavy-Ion Induced Threshold Voltage Shifts in Sub 70-nm
Charge-Trap Memory Cells
– Single ion hit investigated, technology to replace NAND Flash soon
• C3 Impact of Process Variations on SRAM Single Event
Upsets
– 90&65nm process, real data from foundry, large impact on Qcrit
• C4 Impact of the Radial Ionization Profile on SEE Prediction
for SOI Transistors and SRAMs Beyond the 32 nm
Technological Node
– Simulations require realistic ion track profile (done in G4), radius comparable to
feature size
• C5 An Analytical Model of the Propagation Induced Pulse
Broadening (PIPB) Effects on Single Event Transient in Flashbased FPGAs
– 40ps accuracy, model developed for ProASIC3, not fully realistic according to Actel*
• C6 Post SEGR and SEB Investigation of Device Parameters as
Indicators of the Mechanisms in Power MOSFET Failure
– Quite clear distinction between SEGR/SEB on VGS vs. Idrain
Session C – SEEs: mechanisms & modeling
• PC1 14 MeV Neutrons SEU Cross Sections in Deep Submicron
Devices Calculated Using Heavy Ion SEU Cross Sections
– Model allowing to predict the n0/p+ x-section from HI data
Session D – Photonics
• D1 Dose rate and static/dynamic bias effects on CCDs
– Co60 testing compared to real on orbit dark current data
Session E – Environments
• E1 Cosmic-ray Heavy Ions Contribution to Radiation
Effects in the Atmosphere
– Importance of HI increases with altitude, SER are dominated by
neutrons up to ~30km [model for Hitachi SRAM]
• PE2 FLUKA simulations for SEE Studies of Critical LHC
Underground Areas
– Paper relevant to the LHC environments
Session F – SEEs: devices & circuits
• F1 Radiation Results from the ERNObox Flight
Demonstrator Experiment
– Setup with LEON2 FT (Atmel) processor and Flash FPGA (ProAsic3), SRAM
FPGA, SDRAM, SRAM and Ethernet interface.
• F2 SEE test on DC and RF operated GaN Xband HFETs
– 90&65nm process, real data from foundry, large impact on Qcrit
• F3 Single Event Effects in Power MOSFETs and SRAMs
due to 3 & 14 MeV Neutrons
– SEB observed at 3MeV!, 8 MOSFET types tested, fluence to failure ~
1e6cm-2 @ 14MeV, derating tested too
– Direct p+ SEUs on 90nm SRAM, MBU domination
• F4 Impact of Switched Dose Rate Irradiation on LM124 Circuitry
Response Phenomenon in Pulsed X-Ray Environment
– ELDRS behavior could be reproduced by this technique
Session F – SEEs: devices & circuits
• F6 Incremental Enhancement of SEU Hardened 90nm
CMOS Memory Cell
– Example of hardening by resistors and capacitors within the cell
– Cell insensitive to SEUs in LHC environment [readout 100ps, 2.3ns ‘delay’]
– Direct LE proton sensitivity for non hardened cell up to 1e-9cm2/bit !
• F7 Digital SEE Characterization of 0.13-μm Fusion
Mixed-Signal Flash-Based FPGA
– SEL on IO blocks and negatively biased analog blocks only from 40MeVcm2/mg (not expected in LHC)
– Can build i.e. ADC with FUSION, TID tolerance around ~160Gy
• PF6 Non-Intrusive Hybrid Signature-Based Technique to
Detect SEU and SET Faults in Microprocessors
– Results show high detection rates and minor performance degradation
and area overhead (SW signatures + light watchdog)
Session G – Radiation Hardness Assurance
• G1 SEU Analysis of Complex Circuits Implemented in
Actel RTAX-S FPGA Devices
– Shift Register compared to Counter design.
• G2 Analysis of Low Dose Rate Effects on Parasitic
Bipolar Structures in CMOS Processes for Mixed-Signal
Integrated Circuits
– 12bit DAC, 14bit ADC (155MS/s), 8bit UHspeed ADC, tested to 1.5kGy
– Annealing test used to correct the dose rate -> conservative results
• G3 Experimental Demonstration of Pattern Influence on
DRAM SEU & SEFI Radiation Sensitivities
– The optimum pattern is clearly the RANDOM one in 90nm DDR
• G5 Significance of Worst-Case Test Vectors for Logic
Faults Induced in ASICs by Total Dose
– TID resistance depends on mean status of gates in the ASIC
Session H – Technology and Design Hardening
• H1 A Novel Co-Design Approach for Soft Errors
Mitigation in Embedded Systems
– Finding optimum between SW and HW mitigation in i.e. uProc. + TOOL
• H2 FPGA fault tolerance in radiation susceptible
environments
– Programmable SoC built bottom-up in Xilinx SRAM FPGA
• H3 Improved Radiation Hardness-By-Design Library
for 0.15μm Fully Depleted SOI-AISC
– OK to 1.3kGy, commercial process, SEL, SET/SEU free*, OKI Japan
• H5 An Efficient Technique to Select Logic Nodes for
Single Event Transient Pulse-Width Reduction
– Method for identifying the important nodes to mitigate for SET
Session J – Dosimetry and Facilitiy
• J2 The effect of a magnetic field on diodes used as
NIEL counters
– Influence of B field on the same PIN as in the RadMons BPW34F
• J3 LHC RadMon SRAM detectors used at different
voltages to determine the thermal neutron to high
energy hadron fluence ratio
– Already presented during RadWG
• PJ1 Dose measurements and Geant4 calculations on
PMOS dosimeters manufactured with different
oxide thicknesses and gate metals
– Study on LAAS RadFets used i.e. by LHC experiments
Session DW – Data Workshop
• DW1 Single Event Effect Test Results for Candidate
Spacecraft Electronics
– Heavy ions tests to study the Single Event Effects (SEEs) on commercial
emerging technology devices (microcontroller and signal processor)
• DW4 Compendium of TID and SEE Test Results for
Various Candidate Spacecraft
– Radiation data on TID and heavy ion induced single event effects for
commercial integrated circuits (ADC, Memories, Interfaces, PLL)
• DW5 Proton Radiation Test Results of Candidate
Spacecraft Electronic Devices for a Low-Earth Orbit
Micro-satellite
– Proton radiation data on SEE for many types of electronic component
(ADC, DAC, Voltage References, Voltage regulators OpAmp,
Instrumentation amplifier)
– Full results will appear in the final paper.
Session DW – Data Workshop
• DW8 Characterization of Candidate Devices for Very
High Dose Missions
– TID test on OpAmp, DMUX, and transistors.
• DW10 SEE Test Results of National Semiconductor’s
LVDS Driver and Receiver Pair DS90C031 and
DS90C032
– Single Event Latchup, Functional Interrupt and Upset data for
DS90C031WxRQMLV and DS90C032WxLQMLV
• DW13 Results of Single-Event Latchup
Measurements Conducted by the Jet Propulsion
Laboratory
– SEL results for a variety of microelectronic devices (OpAmp,
Voltage Reference, Motor Controller, Switch Mode Controller,
Resolver-to-Digital Converter and Analog-to-Digital)
Session DW – List of devices
• DW1 Single Event Effect Test Results for Candidate
Spacecraft Electronics
Session DW – List of devices
• DW4 Compendium of TID and SEE Test Results for
Various Candidate Spacecraft
– VLSI
• IDT70V658 from IDT
• ADSP_BF532 from Analog Devices
• K9WBG08U from Samsung
– Converters
• AD7940BRM from Analog Devices (The AD7940 is a 14-bit, fast, 3 mW low
power, successive approximation ADC. )
• AD7980BRMZ from Analog Devices
• ADS8329I from Texas Instrument
– Interfaces
• TLK2521 from Texas Instruments (transreceiver)
• SNJ55LVDS31W & SNJ55LVDS3W2 from Texas Instruments
– Linear circuit
• ADCMP580BCP from Analog Devices
• TLC2933A from Texas Instruments
• MAX4427from Maxim
• MAX893L from Maxim
Session DW – List of devices
• DW8 Characterization of Candidate Devices for Very
High Dose Missions
– TID test on OpAmp, DMUX and transistors.
Session DW – List of devices
• DW13 Results of Single-Event Latchup
Measurements Conducted by the Jet Propulsion
Laboratory
Session LN – Late News
• LN6 First In-flight Data Analysis of Displacement
Damages on the OSL Sensor On-board CARMEN-2
– Monitor of the displacement damage dose using the OSL sensor. A
comparison between in-flight measurement on CARMEN-2 and ground
based tests has been presented.
• LN9 The Technology Demonstration Module OnBoard PROBA-II.
– Technology Demonstration Module (TDM) integrated into the PROBAII satellite will provide SEU/SEL data as inputs to improved ground
modeling, predictions and testing. SRAM are used for SEU (ATMEL)
and SEL (ISSI, Samsung, Alliance Sem) monitoring
• LN12 Total Dose Degradation of Voltage Regulators
– L M117, LM137, LM2941, LM2953 detailed TID tests