Transcript Document

Wireless Network on a Chip
Joseph Thomas
22-05-2003
Special Topics in SoC
17/07/2015
1
Introduction




Wireless systems have excellent channeling capability
and low-cost implementation.
Size of antennas to be comparable with their
wavelengths.
As the CMOS device dimensions continue to scale
down, operating speeds of CMOS devices will exceed
100 GHz in the near future.
The optimal aperture size of the antenna is on the order
of 1mm2, which is too large to be implemented.
17/07/2015
2
Time domain simulation of signal
through (a) CPW(b) metal line

Conventional metal
lines with narrow
geometry are
inadequate

Microwave txion in
guided mediums,
have low attunuation
around 200GHz
17/07/2015
3
Wireless NoC(LAN)




ULSI Chips
Capacitive
Couplers
RF Circuits
Off-chip,inpackage CPW
17/07/2015
4
Multiple Access Techniques
Modern FDMA and CDMA algorithms used to alleviate
cross channel interference in the shared medium
FDMA
Top- Level
Schematic of
FDMA
interconnect
17/07/2015
5
Frequency bandsof I/O channels 5~20GHz in each channel to
provide a data rate of 5~40Gb/s.
Block
Diagram
FDMA
Transmitter
FDMA
Reciever
17/07/2015
6
CDMA
CDMA
Interconnect
Operation of
a CDMAinterconnect
with two I/O
subchannels
17/07/2015
7
Top level Schematic of a CDMA Interconnect
17/07/2015
8
Conclusion


17/07/2015
An implementation of Wireless
Network on a Chip was discussed.
Unlike traditional ”passive” metal
interconnect, the ”active” wireless
interconnect is based on capacitive
coupling, low loss and dispersion
free microwave signal transmission
and modern multiple access
algorithms.
9