Transcript Document
AMICSA 2006 summary 03-oct-2006 AMICSA 2006 Slide : 1 AMICSA 2006 in numbers • 48 participants • From 12 countries GR, FR, UK, NE, GE, IT, BE, USA, SWI, SWE, AU • From 26 different institutions/companies DUTH/Space Research Lab, A2S, EADS Astrium, E2V (ex Atmel Grenoble), ESA, CNES, National Semiconductor, TRAD, Aurelia, NTUA, STMicroelectronics, SODERN, SRON, Fraunhofer Inst IC, IHP, IMST, NISR, TESAT, ETH, SUPAERO, Saab, IMEC, AAS, Austria Space Research Inst, Nucletudes, ISD. • 17 presentations in 2 days, 03-oct-2006 plenty of discussions, questions and answers AMICSA 2006 Slide : 2 AMICSA - Applications •CMOS Image sensors •Video processing chain •ADC/DAC/HSSL high speed low power telecom processors (mobile & broadband) •CAN transceivers •TM acquisition & data handling IO control •Magnetometer front end •Slow sampling high resolution 03-oct-2006 AMICSA 2006 Slide : 3 AMICSA – Technology (I/II) PROCESSES FOUNDRIES • CMOS • AMS (Austria) • Bipolar • AMIS (Belgium) • BiCMOS • STMicroelectronics (France) • Si / SiGe • IHP (Germany) • bulk /epi / SOI • Infineon (Germany) • XFab (UK) • UMC (Taiwan) 03-oct-2006 AMICSA 2006 Slide : 4 AMICSA – Technology (II/II) EDA tools, HDL & DK MPW programmes • Tanner • Europractice • Cadence • CMP • Calibre (Mentor) • MOSIS • Pspice / Hspice • vendor specific… • ADMS (Mentor) • VHDL-AMS / Verilog-A • Astrium UK ADC simulator 03-oct-2006 AMICSA 2006 Slide : 5 AMICSA – Radiation effects Rad Threats (TID, SEE) Mitigation Techniques (technology and function dependent) • enclosed/bigger transistors • leakage currents • guardband rings / STI / LOCOS • Vth shifts • avoid diffusion resistors in favor of oxide R • parasitic transistors/ latch up • buried-layers • gate rupture • low gain artificially provoked parasitic transistors • data corruption (bit flips) • SOI • transient pulses • epi layer / hetero-epi • DRC isolation rules • thinner gate oxide • hardened libraries (re-size, cell-topology) • ADC offset auto-zeroing (analog and digital correction) • architecture hardening (open vs closed loop) • redundancy and voting/comparing 03-oct-2006 AMICSA 2006 Slide : 6 AMICSA – Future Challenges • Easier selection of process, foundry, design kit & tools, rad mitigation techniques, quality level • Lower cost access to design kits, manufacturing services • Simulation tools. Characterising COTS (NPR,etc) • Supporting EU foundries in low volume market • Coordinating/reusing EU resources (e.g. rad tests, new libs/DK & IPs), preserving industry competition and individual commercial interests • Finding more resources for more tech/components evaluation and qualification. Sharing results ! •Maintaining good (better) communication channels (ESCC Working Groups , AMICSA 2008 ?, Harmonisation/Tech Dossiers) 03-oct-2006 AMICSA 2006 Slide : 7 AMICSA – THANKS ! • to all participants • to sponsors DUTH / ESA / National Semiconductor • to organizers • Boris Glass and ESA Conference Bureau • Professor Emmanuel Sarris and DUTH / Space research Lab team !! 03-oct-2006 AMICSA 2006 Slide : 8