Transcript CERN Document Server

Upgrade of LHC Detectors:
Summary for ATLAS
FEE2006 Perugia May 2006
Philippe Farthouat, CERN
Presentation Overview
Motivations and expected schedule
Organisation of upgrade activities
Main changes expected
Upgrade of Inner Detector for SLHC
Developments in Electronics for the Tracker
Conclusions
FEE2006 Perugia May 2006
Philippe Farthouat, CERN
Super LHC
Improve the luminosity by a factor 10 : 1034  1035 cm-2 s-1
Physics motivation
Increased physics reach in most typical LHC physics channels
It is not clear today if these improvements are absolutely crucial for new
physics, or rather if they represent (gradually) better measurements and
better exploitation of the LHC energy domain
However, in either case upgrading the LHC seems very attractive and an
obvious next step to plan for
Pragmatic view
The luminosity will increase as function of time at LHC, we will need to
upgrade the detectors to take advantage of this
Some parts of the detector systems might have performance problems or
operational problems, and will therefore require interventions and
improvements faster than foreseen today
An impressive expertise about the construction has been accumulated and
it is known today how to improve the detectors
FEE2006 Perugia May 2006
Philippe Farthouat, CERN
LHC Upgrade:
Machine / Detector Interface
The most relevant parameters for the detectors
BCO interval: 25ns, 15ns, 12.5ns, 10ns (or 75ns)
Forward area/beam pipe : Would like to move the closest machine
element towards the IP
Timescales : assume 2014±2 years
Driven by this plot, but also
by lifetime of IR quads 700 fb-1
Increased radiation levels (and resulting activation) : Need to improve
shielding, moderators, access procedures, and safety in general –
important constraint for any change considered
FEE2006 Perugia May 2006
Philippe Farthouat, CERN
Starting points
SLHC discussions in ATLAS
Assumed luminosity L = 1035 cm-2 s-1
Timescale
upgrade to be finished in 2015
Less appealing aspects need to be taken into account from the very beginning
Constraints from space for services, power consumption, installation scenarios, …
Proper design of services
Anti-magnetic
Low mass
Radiation hard
Reliable
We need to know more precisely the radiation background at the present LHC
(especially for the muon system)
Even though safety factors have been applied
X5 for the muon spectrometer
Much more for electronics
FEE2006 Perugia May 2006
Philippe Farthouat, CERN
Experience from the past:
Path from TDR to Completion
0
1
2
3
4
5
6
7
TDR
Parts (sensors, ASICs,
Opto…)
Modules
Sub-assemblies
Integration
Commissioning
Pre-series
Production
Installation
Conclusion from this: we should have TDR in 2008
Later would shift the completion date away from 2015
But 2008 is too early for getting sufficient data from LHC
TDR will be later than 2008
The ID upgrade has to be done faster than the present ID was done
Limited time for fundamental detector R&D
Ref: talk of Tyndel at Genova tracker upgrade workshop
http://agenda.cern.ch/fullAgenda.php?ida=a053875
FEE2006 Perugia May 2006
Philippe Farthouat, CERN
Presentation Overview
Motivations and expected schedule
Organisation of upgrade activities
Main changes expected
Upgrade of Inner Detector for SLHC
Developments in Electronics for the Tracker
Conclusions
FEE2006 Perugia May 2006
Philippe Farthouat, CERN
Organisational structure
High Luminosity Steering Group
(HLSG)
Since 2 years
Activities on SLHC upgrade growing
within ATLAS
Addressed on ATLAS overview
weeks since Sept 2004
Upgrade workshop (CERN) on
February 13, 14, 2005
Tracker upgrade workshop (Genova)
on 18 –20 July, 2005
Upgrade organisation: Project
Office
project office leader  deputy
steering group chairperson
project office engineer
(sub)system project office engineers
Project Office should technically
guide the upgrade activities
Conceptual design and R&D
Prototyping
Pre-series and construction
Installation and commissioning
Ref: https://edms.cern.ch/file/690177/1/Upgrade_Org_PO.doc
FEE2006 Perugia May 2006
Philippe Farthouat, CERN
Coordination of R&D activities
Established lightweight procedure for
R&D
Does the proposal fit into the activity
matrix?
Scientific merit?
Several proposals issued so far
Radiation test of opto devices
Development of the stave model for silicon
modules
Read-out ASIC for the silicon tracker
Useful for ATLAS?
Circulation to collaboration board
More groups joining?
Second discussion in HLSG
Sufficient resources?
Decision about recommendation by
HLSG
Dedicated high intensity test beam
underway for 2006 and 2007
ATLAS would welcome joint R&D
activities with other experiments (CMS)
Optoelectronic RO including radiationhardness qualification
130 nm or lower processes
Way of selecting solutions after R&D to be defined
Schedule must be defined clearly enough so that date of decision is
known and agreed upon
FEE2006 Perugia May 2006
Philippe Farthouat, CERN
Presentation Overview
Motivations and expected schedule
Organisation of upgrade activities
Main changes expected
Upgrade of Inner Detector for SLHC
Developments in Electronics for the Tracker
Conclusions
FEE2006 Perugia May 2006
Philippe Farthouat, CERN
Areas with significant changes
Complete Inner detector
Parts of muon system
LAr endcap calorimeter
FEE2006 Perugia May 2006
Philippe Farthouat, CERN
Possible BCO modification
BCOs considered
10, 12.5,15, 25 and 75 ns
Muon system
Muon drift tubes (MDT): performance OK
at these rates
Cathode strip chambers (CSC):
assessment needed
Resistive plate chambers (RPC):
performance OK at these rates
Thin gap chambers (TGC): collection time
too long for <25 ns
 no good bunch ID
Calorimetry
Trigger/DAQ
LVL1 need to be changed
12.5 ns will require significant modification
on electronics
15 ns requires significant additional
amount of work and costs for electronics
modification (FE), but possible
10 ns in addition we (might) get
problems with the intrinsic resolutions
for part of the muon system
Need for decision on BCO for SLHC
(impact on electronics)
LAr: in case of BCO other than 25 ns 
need for modification of back-end
electronics
FEE2006 Perugia May 2006
Philippe Farthouat, CERN
Muon system
No major upgrade expected but
Expected hit rate at 1035
100 – 1000 Hz/cm2
High rate degradation expected on
Position resolution
Efficiency (800 ns artificial dead time)
Ref: talk of Kawamoto at the CERN upgrade workshop
http://agenda.cern.ch/fullAgenda.php?ida=a045387
FEE2006 Perugia May 2006
Philippe Farthouat, CERN
Pileup in LAr Calorimeter (1)
Shaper : optimizes signal to noise ratio between electronics noise and pileup
noise
Differentiation to Remove long trailing edge of Lar signal
Electronics : ENI = A/tp3/2 + B/√tp
Pileup : ENE = C√tp
Vary with location and luminosity…
FEE2006 Perugia May 2006
Pileup at 1035
Philippe Farthouat, CERN
Pileup in LAr Calorimeter (2)
Digital filtering to adapt to luminosity [NIM A338, LArg-080]
Slow down or accelerate shaping to adapt from 1033 to 1035
Runs without any change at 1035…
2 sets of optimal filtering coefficients if operated at 80MHz
Increased sensitivity to detector parasitics (inductance) : affects constant term
ATLAS
LAr signal
A = (0.17, 0.34, 0.4, 0.31, 0.28)
Slower
Digital
Filtering
Max Noise
Noise after
digital filtering
A = (-0.75, 0.47, 0.75, 0.07, -0.19)
Faster Digital Filtering
Noise with
optimal analog
filtering
Ref: talk of De la Taille at the CERN upgrade workshop
http://agenda.cern.ch/fullAgenda.php?ida=a045387
FEE2006 Perugia May 2006
Philippe Farthouat, CERN
Impact of BCO on LAr Calorimeter
TTC electronics in the frontend
Any deviation from 40 MHz
would require replacement of
components (crystals / QPLL)
 substantial work
Read-out links speed limited to
32-bit/40 MHz
Any BCO frequency > 40 MHz
would lead to combining
several crossings in one data
sample
Extra processing power
necessary to disentangle them
 change of back-end
electronics
FEE2006 Perugia May 2006
Philippe Farthouat, CERN
Presentation Overview
Motivations and expected schedule
Organisation of upgrade activities
Main changes expected
Upgrade of Inner Detector for SLHC
Developments in Electronics for the Tracker
Conclusions
FEE2006 Perugia May 2006
Philippe Farthouat, CERN
Upgrade of Inner Detector
Present technologies
Gaseous straws for 50 <R< 80 cm (TRT)
Silicon strips (6 – 12 cm long) for 20 <R< 50 cm (SCT)
Pixels (50 x 400 µm) for 6 <R< 20 cm (SCT)
FEE2006 Perugia May 2006
Philippe Farthouat, CERN
Initial tracking idea for SLHC
Overall concept: all silicon tracker
Replace
TRT by long silicon strips
SCT by short silicon strips
Pixel tracker by smaller silicon pixels
Several ideas being developed now, no
final decision made yet
FEE2006 Perugia May 2006
Philippe Farthouat, CERN
One possible upgraded ID
Make barrel longer (reducing material services between barrel and endcaps)
Ref: talk of Allport at Genova tracker upgrade workshop http://agenda.cern.ch/fullAgenda.php?ida=a053875
Including fwd disks
this would lead to:
Pixels: 4.5 m2
~300,000,000 ch.
Short strips: 40 m2
~27,000,000 ch.
Long strips: 251 m2
~15,000,000 ch.
Straw man layout:
Pixel: z=±50 cm, r=6,15,24 cm
50 x 400 & 50x300 µm2
Mini Strips: z=±144 cm, r=35,48,62 cm axial 50µm x 3 cm
Long Strips: z=±144 cm, r=85 & 105 cm stereo 80µm x 9 cm
FEE2006 Perugia May 2006
Philippe Farthouat, CERN
ID subdivison and SLHC dose
Pixels
Max. annual dose
10 years
+ 50% margin
2
Max.
annual
neq/cm
~31016 neq/cm2 10 years
dose
+ 50% margin
neq/cm2
~61015 neq/cm2
r=6 cm
Short ~210
strips 15
r= 15 cm
~41014
Endcap
~2.51014
~41015 neq/cm2
~1.31014
~21015 neq/cm2
r=35-80
cm 2
neq/cm
z=150-300 cm
neq/cm2
Long strips
Max. annual dose
10 years
Barrel
+ 50% margin
r= 24 cm
r= 48 cm
~1.41014
~2.11015 neq/cm2
Endcap
neq/cm2
~11014 neq/cm2
~1.51015 neq/cm2
r= 80-100 cm
14
2
15
~110cmneq/cm
~1.510 neq/cm2
z= 150-300
r= 62 cm
Barrel~81013 neq/cm2
r= 35 cm
~1.21015 neq/cm2
r= 84 cm
~61013 neq/cm2
~91014 neq/cm2
r= 105 cm
~51013 neq/cm2
~7.51014 neq/cm2
Ref: talk of Allport at Genova tracker upgrade workshop
http://agenda.cern.ch/fullAgenda.php?ida=a053875
Ref: talk of Vossebeld at RD50 workshop Nov 2005
http://rd50.web.cern.ch/rd50/7th%2DWorkshop/
FEE2006 Perugia May 2006
Philippe Farthouat, CERN
Development “stave model”
Stave model
Multi-module structure for barrel
Integrated services
First approach
Starting with ministrips (3 cm)
Hybrid configuration like in
present SCT barrel module
Ref: talk of Allport at Genova tracker upgrade workshop
http://agenda.cern.ch/fullAgenda.php?ida=a053875
FEE2006 Perugia May 2006
Philippe Farthouat, CERN
Alternative stave model
Integrated services
Peek cooling channels with CF cooling
Operating at < -25 °C (strips) and -30 °C
(microstrips, pixels)
Also power and control lines integrated
 power interface and bus drivers needed
R&D proposal issued
https://edms.cern.ch/document/713247/1
Ref: talk of Haber at Genova tracker upgrade workshop
http://agenda.cern.ch/fullAgenda.php?ida=a053875
FEE2006 Perugia May 2006
Philippe Farthouat, CERN
Detector R&D for R< 20 cm
3D sensor development
Fast charge collection
Lower Vdepl
But higher capacity
Until now fabricated on a small
scale in house (Stanford)
0
3x1015 p/cm2
10 years
LHC at
1034 cm-2s-1
At r=4cm
Yield now 80%
Arrangements for commercial
production at SINTEF (still in
early state)
Signal efficiency [%]
Radhardness considerably
better than standard silicon
Fluence p/cm2
1.6 1016
8 1015
2.4 1016
100
3.2 1016
1.8x1016p/cm
2
10 years
SLHC at
1035cm-2s-1
At r=4cm
80
60
3D silicon C. DaVia et al. March 06
40
20
n-on-p strips P. Allport et al.
IEEE TNS 52 (2005) 1903
Ref: talk of Parker at Genova tracker upgrade workshop
http://agenda.cern.ch/fullAgenda.php?ida=a053875
n-on-n pixels CMS T. Rohe et al.
NIMA 552(2005)232-238
0
0
5 1015
1 1016
1.5 1016
2 1016
Fluence [n/cm2 ]
FEE2006 Perugia May 2006
Philippe Farthouat, CERN
Presentation Overview
Motivations and expected schedule
Organisation of upgrade activities
Main changes expected
Upgrade of Inner Detector for SLHC
Developments in Electronics for the tracker
Conclusions
FEE2006 Perugia May 2006
Philippe Farthouat, CERN
Electronics for the Tracker
Three domains of activity
Power distribution
Read-out Links
Front-end electronics
FEE2006 Perugia May 2006
Philippe Farthouat, CERN
Services
Services in the current detector are a real pain
FEE2006 Perugia May 2006
Philippe Farthouat, CERN
Power Distribution
The number of channels in
the tracker is going to
increase
The electronics technology
will need less power but not
less current
What is a pain today will be
an unsolvable problem
Two alternatives looked at
DC-DC converters
Serial powering
Source: 9/2002 GEANT-4 simulation by D. Constanzo
Pixel detector material budget
FEE2006 Perugia May 2006
Philippe Farthouat, CERN
DC-DC Convertors
On-going development of
switched capacitor
converters
V eff and I eff vs period
1.2
Conversion Ratio 5-to-1,
using a 0.35 µm technology,
at an operating frequency of
5Mhz
Voltage efficiency ~.84
Current efficiency ~.92
efficiency
1
0.8
V eff
I eff
0.6
0.4
0.2
0
0
0.2
0.4
0.6
0.8
1
period (us)
Ripple = 1.2%
Output impedance = 0.25
ohms (25mv / 100ma)
Ref: talk of Ely at Genova tracker upgrade workshop
http://agenda.cern.ch/fullAgenda.php?ida=a053875
FEE2006 Perugia May 2006
Philippe Farthouat, CERN
Serial Powering
Currently used Parallel Powering:
constant
voltage
Powerlines
constant
voltage
constant
voltage
constant
voltage
Modules
Idea of Serial Powering:
TWO
powerlines
constant
current
Modules
10V
FEE2006 Perugia May 2006
7.5V
5V
2.5V
0V
Philippe Farthouat, CERN
Serial Powering (cont.)
on chip
Basic principle:
Constant current through all
modules
LinReg
ShuntReg
Voltages generated on FE chip by
Shunt regulators
Linear regulators
FE chip
Shunt
regulator
FE
FE
core
core
Shunt
regulator
FE
FE
core
core
FEE2006 Perugia May 2006
Linear
regulator
Linear
regulator
Philippe Farthouat, CERN
Serial Powering (cont.)
Tests done with SCT (4 modules) and Pixel (6
modules) have shown no effect on noise
Still a lot of issues to be looked at
Loss of a regulator
Floating modules
AC coupled or optics read-out
Ref: talks of Weber and Grosse-Knetter at Genova tracker upgrade workshop
http://agenda.cern.ch/fullAgenda.php?ida=a053875
FEE2006 Perugia May 2006
Philippe Farthouat, CERN
Read-out Links
In the current tracker there are 3 types of read-out
links
Two optical links at 40 and 80 Mbits/s for SCT and Pixel
40 Mbits/s copper links and Gbit optical link for the TRT
Strong wish to define at least common building
blocks and opto-packages
First questions:
Which read-out architecture?
Which speed?
FEE2006 Perugia May 2006
Philippe Farthouat, CERN
Straw Man Lay-out
#
modules/
hybrids
# staves
Data rate
/
hybrid-module
Data rate
/
stave
B-Layer
400
24
640 Mbits/s
10 Gbits/s
Outer 1
960
60
240 Mbits/s
4 Gbits/s
Outer 2
1600
100
240 Mbits/s
4 Gbits/s
Mini 1
1440
60
35 Mbits/s
840 Mbits/s
Mini 2
1920
80
35 Mbits/s
840 Mbits/s
Mini 3
2496
104
35 Mbits/s
840 Mbits/s
Long 1
960
120
41 Mbits/s
330 Mbits/s
Long 2
1200
150
41 Mbits/s
330 Mbits/s
Pixel
Mini Strips
Long strips
Expected data rate at SLHC
A few Gbit/s look OK
FEE2006 Perugia May 2006
Read-out architecture to be
looked at to find common
building blocks
Philippe Farthouat, CERN
Opto-Links: Current activity
One R&D project presented and approved
https://edms.cern.ch/document/694105/1.05
Radiation testing of existing devices and of COTS
Include VCSELs, PIN Diodes and also serialisers
Strong wish to collaborate actively with CMS
Common forum put in place
Ref: talk of at Genova tracker upgrade workshop
http://agenda.cern.ch/fullAgenda.php?ida=a053875
FEE2006 Perugia May 2006
Philippe Farthouat, CERN
Front-end electronics
Need to follow technology trends
Radiation hardness is a key issue
Strong interest in very deep sub-micron
technologies
Development of a pixel read-out chip already started
Could be used for the B-Layer replacement
Production to be done in 2010 for an installation in 2012
Ref: talk of Einsweiler at Genova tracker upgrade workshop
http://agenda.cern.ch/fullAgenda.php?ida=a053875
FEE2006 Perugia May 2006
Philippe Farthouat, CERN
Silicon Strip Read-out
R&D proposal: development of a CMOS 0.25 read-out chip (ABCNext) compatible with the existing one (ABCD)
to prepare a design of the front-end ASIC in deep submicron radiation
tolerant technology
to implement functional blocks and circuit options required for new
designs of modules and staves being developed for the upgrade Inner
Detector
Fully compatible with existing read-out system
To be used for testing detector and architecture choices:
Able to accept both signal polarity
Implementation of on-chip power regulation systems to enable the design
of detector modules powered through DC-DC converter or serial powering
schema
Faster read-out capability
DC balanced protocols for possible AC coupling
Tools for capability of concentrating several read-out links on a Gbit
serialiser
Ref: R&D proposal https://edms.cern.ch/document/713247/1
FEE2006 Perugia May 2006
Philippe Farthouat, CERN
ABC-Next Proposal
Shunt and Linear regulators to be included
ABC-Next Block Diagram
Design in 2006
To be used on stave prototypes as from 2007
FEE2006 Perugia May 2006
Philippe Farthouat, CERN
Next steps for the strips read-out
ABC-Next in 0.13 CMOS technology
Year 1 is (should be) 2006
FEE2006 Perugia May 2006
Philippe Farthouat, CERN
SiGe Option
Interest for the SiGe option
Main motivation being the possible power saving at the preamplifier stage
J. Kaplon et al., 2004 IEEE Rome Oct 2004, use 0.25 mm
CMOS
For CMOS: Input transistor: 300 mA, other transistors 330 mA (each 20 – 90 mA)
FEE2006 Perugia May 2006
Philippe Farthouat, CERN
SiGe Benefit
CHIP TECHNOLOGY
0.25 mm CMOS ABCDS/FE
FEATURE
J. Kaplon et al.,
(IEEE Rome Oct 2004)
Power: Bias for all but front transistor
330 mA
0.8 mW
IBM enhanced 5HP SiGe
8*5 mA
= 40 mA
0.1 mW
(conservative)
Power: Front bias for 25 pF load
300 mA
0.75 mW
150 mA
0.375 mW
Power: Front bias for 7 pF load
120 mA
0.3 mW
50 mA
0.13 mW
Total Power (7 pF)
Total Power (25 pF)
2x10 15
3x1014
1.1 mW
1.5 mW
0.23mW
0.48 mW
Cost and yield (for large area chips) may be a problem
Ref: talk of Grillo at Genova tracker upgrade workshop
http://agenda.cern.ch/fullAgenda.php?ida=a053875
FEE2006 Perugia May 2006
Ned Spencer’s talk this week
Philippe Farthouat, CERN
Summary of Developments
On-going developments or tests
Serial powering
DC-DC converters
Pixel front-end chip in 0.13 CMOS
Strip front-end in SiGe
“Official” R&D proposal
Radiation hardness of existing links components (approved)
Stave development (being reviewed)
ABC-Next read-out chip (being reviewed)
FEE2006 Perugia May 2006
Philippe Farthouat, CERN
Conclusions
ATLAS upgrade activities have been started up
Aim for completion: 2015
The R&D and development phase must be faster than in the past
Selection process to be defined and agreed upon
Schedule is a key element
Major activity is the replacement of the complete Inner Detector
Other sub-detectors require less dramatic changes
Big number of silicon strip modules (20k vs 4k now)
Electronics R&D in power distribution, read-out links and front-end
designs
FEE2006 Perugia May 2006
Philippe Farthouat, CERN