Transcript Slide 1
Local-Gated Single-Walled Carbon Nanotube Field Effect Transistors Assembled by AC Dielectrophoresis
Paul Stokes and Saiful I. Khondaker
Nanoscience Technology Center and Department of Physics, University of Central Florida, Florida 32826, USA
INTRODUCTION & MOTIVATION
RESULTS
• Carbon nanotube field effect transistors (CNT-FETs) have displayed exceptional
electrical properties superior to the traditional MOSFET.
• Most of these fabrication methods for CNT electronic devices are based on either
random positioning or directed assembly by high temperature growth on patterned
substrate, which are not compatible with conventional CMOS technologies.
• Most of these devices are controlled by only a global back gate. They do not offer high
throughput or individual control of each CNT-FET necessary for parallel fabrication.
• For large-scale fabrication of CNT-FET devices three conditions need to be satisfied: (i)
separation of semiconducting and metallic carbon nanotubes must be realized, (ii)
nanotubes need to be assembled at selected positions of the circuit with high yield, and
(iii) each nanotube must be addressed individually with a local gate.
• We present a simple and scalable technique for the fabrication of CMOS compatible
and local gated CNT-FETs from solution. The approach is based on directed assembly
of individual SWNT via AC Dielectrophoresis.
(a)
(b)
1. Electronic Transport Characteristics of DEP Assembled Device
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(a)
(b)
50% Metallic
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I DS (A)
I DS (A)
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Assembly
Method
Gate
Material
Subthershold
Swing (mV/dec)
Threshold Voltage
(V)
Ref
DEP
SiO2/Back
gate
1200
1.5
3
-8
CVD/ALD
Al2O3/Local
gate
10
120
N/A
4
CVD
SiO2/Back
gate
1000-2000
N/A
5
DEP
Al2O3/Local
gate
170
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this work
(6)
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b)
50% Semiconducting
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Catalytic Island
4. Comparison to Other DEP and CVD Assembled CNT-FETs
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0
5
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10
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0
VBG(V)
5
10
VBG(V)
5. Electric Field Simulation
Figure 3: Drain current (IDS) - back gate voltage (VBG) characteristics of representative DEP assembled
metallic (a) and semiconducting (b) devices (VDS = 0.3 V).
(a)
Figure 1: (a) Random placement of CNT by drop casting from solution. (b) Patterned growth from CVD.
Requires temperatures of 900 C.
Al2O3
(b
)
SiO2
2. Electrical Breakdown of Metallic SWNT
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Re[K f ]
Au
Au
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Device Fabrication and Dielectrophoretic Assembly
After Electrical Breakdown
(b)
1
4
10
10
(a)
m-SWNT in DCE
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METHODS
80
12
10
s-SWNT in DCE
0
10
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10
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I DS (A)
I ( A)
• Devices were fabricated on heavily doped silicon (Si) substrates capped with a thermally
grown 250 nm thick SiO2 layer.
• Contact pads and electron beam markers were fabricated with optical lithography using
double layer resists, metallization of Cr (5 nm) and Au (50 nm) and finally standard lift-off.
• Source and drain electrode patterns were defined with EBL 5 nm Cr and 20 nm thick Au
were thermally deposited followed by lift-off.
• 100 nm wide Al gate patterns are defined by EBL with 20-25 nm thickness.
• The sample is treated in oxygen plasma to create a thin aluminum oxide dielectric layer.
DEP assembly:
• HiPco grown SWNTs (Carbon Nanotechnologies Inc.) was ultrasonically dispersed in 5
ml of 1,2-dichloroethane for approximately 30 minutes.
• A small drop (~8ul) was cast onto a chip with 12 pairs of source-drain electrodes, each
containing a 100 nm wide Al gate. An AC voltage of approximately 8 VP-P at 1 MHz is
applied for 1-2 seconds.
2
VBG=+10V
40
10
10
0
3
6
10
10
9
10
Frequency (Hz)
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FDEP m Re K f E
2
RMS
*p m*
Kf *
m
*
p ,m
p ,m
p ,m i
2 ( m p m2 ) m p m2
Re[K f ]
2 m2 m2
VDS=0.3 V
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10
0
0
5
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10
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VDS (V)
0
VBG(V)
5
10
Figure 6: (a) Electric field simulation between a 1 um gap. Shows that the gradient of electric field is
strongest near the tips of the electrodes. (b) Plot of the Clausius Mosetti factor (KF) for SWNTs in
dichloroethane. The force is positive for both semiconducting and metallic SWNTs up to ~5 GHz.
Figure 4: (a) Transformation of a nanotube bundle into a semiconducting device by selective
breakdown by sequential ramps of VDS (labeled 1 and 2) with back gate set to 10 V. INSET: Resultant
current - back gate characteristic after breakdown (VDS = 0.3 V).
CONCLUSION
3. Local Gate Characteristics
(a)
Au
Au
• We have fabricated CNT-FETs with local Al bottom gates through DEP.
• Our method offers a convenient way to assemble local-gated CNT-FET devices from
solution without the need of high temperature growth, making it compatible with present
microfabrication technology.
• Our local-gated devices show superior characteristics such as small values of threshold
swing and low threshold voltage compared to other DEP assembled back gated CNTFETs.
• Local gating offers fast switching behavior due to the channel controlled mechanism
owed to the thin local Al gate.
• Directed assembly of local gated CNT-FETs at selected position of the circuit via DEP
may pave the way for large scale fabrication of CMOS compatible nanoelectronic devices.
(b)
Au
Au
0.0
(a)
SiO2
SiO2
Si
Si back gate
(b)
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10
-0.2V
Back
Gate
-0.4V
-0.1
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(d)
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10
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S
LG
10
SWNT
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10
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I DS ( A)
Al/Al2O3 local gate
(c)
I DS (A)
10
1MHz,
8Vp-p
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VDS=0.3V
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Local
Gate
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HiPCO SWNTs
D
Figure 2: Fabrication of local gated CNT-FET device. (a) Source (S) - drain (D) electrodes of 1 μm
separation are patterned. (b) Local Al/Al203 gate electrodes are patterned using EBL. (c) DEP assembly
of CNT from solution. (d) AFM image of a device showing nanotubes are assembled at the tips.
-0.6V
-0.8V
-0.2
-1.0V
-1.2V
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0
1
VLG(V)
-0.3
10
200nm
0V
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0
VG (V)
5
10
VLG=-1.4V
-1.6
-1.2
-0.8
-0.4
REFERENCES
0.0
VDS(V)
Figure 5: (a) IDS versus VLG and VBG for comparison form the same device after DEP assembly. Local
gate shows far better gate coupling. INSET: Expanded plot of IDS vs. VLG showing low threshold voltage
and subthreshold swing. The gate leakage current is < 1 pA. (fast switching is possibly due to channel
controlled operation). b) Output characteristics, for different gate voltages up to the saturation regime.
1.
2.
3.
4.
5.
6.
Tans et al., Nature, 393, 49 (1998).
Kasper Grove-Rasmussen, University of Copenhage, Denmark, PhD thesis (2006).
Dong et al, J. Phys. Chem. B 109 13148 (2005).
Lin et al, IEEE Elec. Dev. Lett. 26 823 (2005).
Javey et al, Nature Mater. 1 241 (2002).
P. Stokes and S. I. Khondaker, Nanotechnology 19 175202 (2008).
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