The EDSAC Replica Project

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Transcript The EDSAC Replica Project

Electronic Delay Storage Automatic Calculator
The EDSAC Replica
Project
Andrew Herbert, with thanks to Chris Burton, July 2012
The EDSAC Replica Project
The Proposition
Project Organisation
Feasibility Studies
Costs and Timescale
The Proposition
An enquiry in 2010 by Hermann Hauser, wellknown Cambridge technology entrepreneur:
“Would it be feasible to build a replica of
the famous EDSAC?”
Assume the goal is to replicate the machine
as it was in May 1949 when it ran its first
program
Let it be a tangible tribute to Maurice
Wilkes, though he was somewhat sceptical
about the proposal!
Edsac Firsts
1. The first machine to provide a “computing
service”
• Conservatively designed, highly reliable
• Mathematicians, scientists, engineers at Cambridge
University) took turns to use it as a personal computer
• Contributed to Cambridge scientific advances in
astronomy, X-ray crystallography and many other
fields
2. The biggest single leap in computing power ever
• 1,500x speed of the mechanical calculators it replaced
3. The first machine to read in symbolic programs
(as opposed to patching, hand keying etc)
• Hardware “initial instructions” embodied a relocating
assembler to read in user’s program and library
routines from paper tape.
Overall Organisation
EDSAC Replica Limited
A charitable trust
Sponsors + University of
Cambridge + BCS
Management Board
CCS + TNMoC
+ Project Manager
The Replica
Project Manager +
volunteers
Fundraising
Ownership
Legal
Overall
operations
Day to day
operations
Key Facts for Programmers

Two registers: accumulator and multiply

512 words of memory

35 bit memory: two 17 bit half words plus
“sandwich digit”

Fixed point arithmetic

Paper tape input

Teleprinter output

Initial instructions embody simple assembler
Order Code
F (5)
•
•
•
•
•
•
An
Sn
Hn
Vn
Nn
Tn
• Un
• Cn
• R 2n-2
-
a += [n]
a -= [n]
m := [n]
a += m*[n]
a -= m*[n]
n := a;
a := 0
n := a
a += m&[n]
a := a >> n
n (10)
•
•
•
•
•
•
•
•
•
L 2n-2
En
Gn
In
On
Fn
X
Y
Z
L
a := a >> n
jmp if a<0
jmp if a≥0
n:=input
output:=[n]
check
no op
round a
stop
EDSAC Architecture
Automatic Digital Computers, M.V. Wilkes, 1956
Mercury Delay Line Memory
Maurice Wilkes with
a battery of 16
storage tanks
Each tank holds 16
x 36 bit words as a
train of acoustic
pulses
Computer has to
synchronize with
the memory
Serial Computing
Most of EDSAC is serial
Process one bit of a word at the time
Reduces number of components needed
From Edsac Report
Decoding and Coincidence
Have to go parallel
to decode function
number and memory
address
Automatic Digital Computers, M.V. Wilkes, 1956
Building the Replica
Authenticity
We don’t have a complete blueprint,
so we aim to...
be
consistent with photographs and
contemporary records
use
period components and circuits when
available
use
camouflaged modern components
otherwise
adhere
to EDSAC architectural principles
(i.e., serial processing) when designing
Feasibility Studies

Documents & knowledge acquisition

Physical design

Logic design & simulation

Electronic design & experiments

Acquisition of parts

Areas of work not started

Skills required
Documents & Knowledge Acquisition

Original technical description &
diagrams from Cambridge Computer
Laboratory archives

Original photographs & published
papers

Recollections of pioneers

All collected in project Dropbox

EDSAC ran for 10 years so need to
understand the evolution of the
machine. (our target 6th May 1949)
Physical Design

Scanning and measuring from photos

12 racks, 120 chassis (“panels”)

An original chassis
exists to measure

The above chassis has
been drawn up and a
sample made

We don’t know how
many types of chassis
there were, or where
they were placed in the
racks
Logic Design & Simulation

Need to know how EDSAC works in detail

Incomplete & inconsistent diagrams

Evidence of much re-design during
commissioning

Need to extrapolate undocumented areas of
logic

Simulation essential to give confidence
before committing to building anything
Typical Logical Diagram
From Edsac Report
Typical Timing Diagram
From Edsac Report
Logic Simulation

Bill Purvis has written a simulator for whole
logic - can run a program, very slowly.

Several areas such as reader and printer
modelled as ‘black boxes’
Electronic design

Electronic design is incomplete and lots of
redesigning went on during commissioning

AC-coupled circuits - unfamiliar!

AND-gate uses 3 pentodes and 3 diodes

Main components: flip-flop, inverter, short
delay, pulse amplifier

Experiment shows stage delay is very
short

Requires many lumped-constant delays
Typical Circuit Diagram
From Edsac Report
Mapping Logic to Circuits to
Chassis

Use photos to try to guess what each
chassis does

Physical location of more than half the
logic is now understood - the easy bits!

Some partial clues from logic diagrams
Mapping Logic to Chassis
Memory Tanks
Maurice Wilkes with
a battery of 16
storage tanks, each
16 x 36 bit words
The 5 ft steel tubes
contain mercury as
the acoustic delay
medium
Replica Memory Tanks

Risky and costly to use mercury, except
perhaps in one example tank

Precision engineering required:
tubes and end plates – aligned
to within 0.001” end-to-end

Will use nickel delay lines as a
reasonable alternative

Use semiconductor shift
registers to get off the ground
quickly
Acquisition of Parts

Many, but not all, valves are available and
already to hand

B9G valveholders will be problematic

Authentic ‘period’ resistors and
capacitors may be difficult to find and
too unreliable to use

Lumped-constant delay lines need to be
made, lots of coils to wind
Areas not yet looked at

HT power supply - +250v at say 15 amp

Negative power supplies

Electrical hazard of open circuit wiring

The ‘three oscilloscope unit’

Tape reader

Teleprinter
Skills mix needed

Understand logic and map to electronic
circuits

Map electronic circuits to individual chassis

Wiring up 120 chassis - 3000 valves –
60,000 solder joints!

Ability to track down lots of components

Delicate manipulative skills for delay lines

Some circuit design capability for replica
store
Costs and Timescale

Preliminary estimates indicate cost in the
region of £250,000

With adequate availability of volunteers to
do the construction, it could take 3-4 years
Current Status

In addition to design research reported
here…

Charity registered and bank account
opened

Initial donations to fund first year

Detailed planning started

Initial milestones – pulses, counting, storing
Work in Progress

Demonstrate EDSAC Pulses: Clock Pulse
Generator and Digit Pulse Generator
chassis operation

Demonstrate Counting: Clock Pulse
Generator + Half Adder + Short Tank

Demonstrate Store Cycles: Address
Decoding + Store Regeneration + Long Tank
Electronic Delay Storage Automatic Calculator
The EDSAC Replica
Project