Transcript Semiconductor Process Technology

io III
Lecture
Single Crystal Silicon Wafer
Manufacturing
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Objectives
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Why Single Crystal Material?
 Single crystal Si wafers the most commonly used semiconductor
material in IC manufacturing.
 In the original form, most solid materials exist in the form of amorphous
or polycrystalline structures.
 To make an industrial standard transistor, a single crystal semiconductor substrate is required. This is due to the scattering of electron
from the grain boundary can seriously affect the p-n junction
characteristics.
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Why Silicon?
 Abundant, 26% earth crust’s is silicon. One of the most abundant
element on earth.
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 Can form a very stable and strong oxide and easy to grow.
 Larger bang gap (compared to Ge), can tolerate a higher operation
temperature, wider impurity range and higher breakdown voltage.
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Crystal Structure
 Atomic structure of a single crystal Si unit cell
 Crystal orientations are defined in Miller Indexes.
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MOS IC
Bipolar IC
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Crystal Defects
 Vacancy – missing atom from crystal lattice
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 Interstitial defect – extra atom in between normal lattice
 Frenkel defect – vacancy and interstitial in pair
 Dislocation – geometric fault
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Dislocation
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From Sand to Wafer
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From Sand to Wafer
 1st step: Crude Silicon or MGS (~ 99% poly-crystal silicon)
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From Sand to Wafer
 2nd step: High Purity TCS Formation (Trichlorosilane, SiHCl3)
 MGS grinded into powder
 MGS powder react with HCL to form TCS
 TCS is purified up to 99.9999999%
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From Sand to Wafer
 3rd step: EGS (Electronic Grade Silicon) Formation – polycrystal form
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From Sand to Wafer
 4th Step: Crystall Pulling
 EGS to be heated at high temperature and pulled using singleCrystal silicon seed.
 2 methods;
 Czochralski (CZ) Method – larger diameter, lower cost, in situ
doping.
 Floating Zone (FZ) Method
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From Sand to Wafer
 CZ Method
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From Sand to Wafer
 CZ Method
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From Sand to Wafer
 FZ Method
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FZ and CZ Comparison
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From Sand to Wafer
 5th Step: Ingot Polishing and Wafer Sawing
 Ingot polishing to remove the grooves created during pulling
 Wafer slicing
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From Sand to Wafer
Typical Wafer Parameters
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 6th Step: Wafer Finishing
•Grinding
•Edge Polished
•Slicing
•Lapping
•Polished
•Process Control
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Epitaxial Wafer
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Epitaxial Wafer
The most expensive process step, ~ USD 20 -100 per step compared to
USD 1 per step for other process.
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