Transcript Presentation on Evolutionary Hardware and My Project (11-15-04)

Evolutionary Hardware
Dmitry Berenson
What is Evolutionary
Hardware?
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Automated Digital Circuit Design
Automated Analog Circuit Design
Automated VLSI Layout Design
Automated Filter Design
Automated Controller Design
Automated Antenna Design
Fault Tolerance
Previous Work
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Adrian Thompson (1996) –
FPGA Tone Discriminator
Layzell et al. (1998) –
Evolvable Motherboard
Flockton and Sheenan (1998) –
Intrinsic Evolution of analog
circuits on Zetex TRAC chip
Stoica and Zebulum (20022003) – FPTA and SABLES
Our Goals
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Evolve a circuit to perform a given task
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Perform on-chip evolution
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Introduce new FPAA (Anadigm) to
research community
Why Do Analog?
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Analog circuit design is more of an art than a science.
– That means it’s really hard.
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Software simulation has problems
– Solving circuit equations (differential) takes a lot of CPU time.
– Software is still inaccurate
– There is an accuracy-to-speed tradeoff for simulation
The Setup
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FPAA
– Anadigm AN221E04
– Lattice ispPAC30
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Computer
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Gets Samples
Computes Fitness
Runs Genetic Algorithm
Programs FPAA
A/D Converter
– Dataq DI-158U
The Setup
Anadigm Chip - Features
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Circuits created according to
routing table
Uses Configurable Analog
Blocks (CAB)
Dynamically Reprogramable
(SRAM)
CABs can contain multiple
modules
Anadigm Chip - Modules
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Modules (CAMs) are software “blocks”
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Modules correspond to routings in hardware
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28 Modules Total
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Each Module has it’s own settings
– This will be hard to work with
when doing evolution
List of Modules
Anadigm Chip - Procedure
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Place modules
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Make connections
– Another problem: some blocks
have more than 2 connections
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Download to chip
Placement/Connections can be
automated through C++
commands
– “Not Officially Released”
Anadigm Designer Interface
Anadigm Chip – Search Space
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A CAB can only hold 2-3 modules (CAMs)
– a safe number of total modules is around 6
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Search space is roughly:
(28^6)(Connections)(Module Specific Options) = Big
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The plan: have 6 modules, evolve their type, settings and
interconnections
Current Status
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A/D converter sampling and FPAA iterative programming all
running from one MFC application
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Ready to start running Genetic Algorithms
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Want to start small (only a couple CAMs)
Your Suggestions
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Representation
– Individuals with 6 genes.
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Gene: (CAM type, connection 1, connection 2, setting 1, setting 2…)
– Variable Length Strings?
– Keeping track of CAM types – options and connections
– Linkage – any block that has a path to output affects all other
blocks following in that path
– Fitness Function – sum of errors
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Applications
– Controller
– Filter
– Arbitrary Function