Transcript EMC of ICs
Electromagnetic Compatibility of Integrated Circuits (EMC of ICs) Alexandre Boyer INSA de Toulouse April 18 2008 1 OUTLINE AGENDA 9h - 12h: EMC of ICs – part I (Course) 14h - 17h: EMC of ICs – part II (Course) OBJECTIVES At the end of the course, the auditor will be able to understand the origins of electromagnetic compatibility (EMC) issues at integrated circuits level, the basic knowledge to face with EMC issues, and become familiar with the most common circuit-level EMC design guidelines. PRE REQUISITES Basic knowledge in electrical circuits, CMOS technology, electromagnetism. 2 OUTLINE CONTENT Introduction EMC Basics concepts Emission/Susceptibility Measurement methods EMC Models EMC Guidelines Conclusion Origin / Future of EMC 3 1. Introduction 4 What is EMC ? Two examples « Disturbances of flight instruments causing trajectory deviations appear when one or several passengers switch on electronic devices. » (Air et Cosmos, April 1993) 29th July 1967 : accident of the American aircraft carrier USSForrestal. The accidental launching of a rocket blew gas tank and weapon stocks, killing 135 persons and causing damages which needed 7 month reparations. Investigations showed that a radar induced on plane wiring a sufficient parasitic voltage to trigger the launching of the rocket. 5 What is EMC ? « The ability of a device, equipment or system to function satisfactorily in its electromagnetic environment without introducing intolerable electromagnetic disturbance to anything in that environment. » Guarantee the simultaneous operation of all nearby electric or electronic devices and the safety of users in a given electromagnetic environment Reduce parasitic electromagnetic emission and their sensitivity or susceptibility to electromagnetic interferences Maximum levels and methods to characterize emission and susceptibility of an equipment are defined by standards 6 What is EMC ? Examples of EMC standards The existence of EMC specifications is linked to the safety and robustness level that an equipment must reach. EMC standards for automotive, aerospace, military, transport, medical, telecommunication applications, but also for commercial products • European EMC directive 89/336/EEC about electronic products EMC requirements • IEC-TC77 and CISPR : IEC technical committee related to EMC standards • For automotive applications : ISO 7637, ISO 11452, CISPR 25, SAE J1113 CE mark • For military applications : MIL-STD-461D, MIL-STD-462D • For aerospace applications : DO-160 • For integrated circuits : IEC 61963, IEC 62132 7 Context - Technology Scale Down Micron Deep submicron Submicron Lithography (µm) Ultra deep Nano scale Deep Nano submicron Industry Channel length divided by 2 each 18 month in the 90’s Pentium III Research has 5 year advance on industry 80286 2.0 16MHz 1.0 80386 33MH z 486 66MHz Pentium 120MHz 0.3 0.7GHz 0.25µm 0.2 Pentium IV 3GHz 0.1 Research Pentium DualCore 2.2GHz 65nm 45nm 32nm 0.05 0.03 Working 7nm device 0.02 22nm 0.01 83 86 89 92 95 98 01 04 07 10 13 This trend has major consequences on electronic systems safety, reliability, … and EMC Year 8 EMC of ICs Why EMC of ICs • Until mid 90’s, IC designers had no consideration about EMC problems in their design. EMc was only handled at system and PCB levels • Many EMC problems originate from ICs (3rd origin of IC redesign !), as it is the source of noise emission and sensitivity • With technology trends (increased clock speed, chip complexity and reduced voltage), ICs are more emissive and sensitive to noise • Semiconductor manufacturers are faced with increasing customer expectations for designing low emission and highly immune ICs EMC must be handled at IC level 9 EMC of ICs EMC of IC topics Improve or develop EMC measurement methods to respond to new customer’s requests Develop simulation tools to predict EMC of IC behavior Develop design guidelines aiming at reducing emission and susceptibility levels Emission level measurement Simulation Customer’s specifications IC emission spectrum Target Frequenc y 10 EMC of ICs Design issues EMC problems handled at the end of design cycle DESIGN FABRICATION Architectural Design Design Entry Design Architect Version n° Version n° EMC Measurements Compliance ? NO GO GO 11 EMC of ICs Design issues DESIGN Tools EMC problems handled at the end of design cycle Training Design EMC Guidelines validated before fabrication Architectural Design Design Entry Design Architect EMC Simulations Compliance ? NO GO GO FABRICATION EMC compliant 12 2. EMC Basic Concepts 13 EMC environment The “EMC” way of thinking Electrical domain Electromagnetic domain Voltage V (Volt) Electric Field E (V/m) Current I (Amp) Magnetic field H (A/m) Impedance Z (Ohm) Characteristic impedance Z0 (Ohm) Z=V/I Z=E/H P=I2 x R (watts) P=H2 x 377 (watts/m2) far field conditions 14 Specific Units Voltage units Wide dynamic range of signals in EMC → use of dB (decibel) For example dBV, dBA : dBV 20 log V dBA 20 log A Extensive use of dBµV V VdBµV 20 log 1µV 20 log V 120 Milli Volt Volt dBV 100 40 1 60 10 20 0.1 40 1 0 0.01 20 0.1 -20 0.001 0 0.01 -40 0.0001 -20 0.001 -60 0.00001 -40 dBµV 15 Specific Units Power units Power (Watt) Power (dBm) The most common power unit is the “dBm” (dB milli-Watt) 1 MW 90 P PdBmW 10 log W 10 log PW 30 1 mW 1 KW 60 1W 30 1 mW 0 1 µW -30 1 nW -60 Exercise: Specific units 1 mV = ___ dBµV 0.1 W = ___ dBm 16 Specific Units Emission and susceptibility level units dBµV dBµV/m 80 50 Class 4 70 60 40 30 Class 5 50 20 40 30K 10 1M 300K Class 5 3M Conducted emission level (CISPR25) 30M 10M 100M 1G Radiated emission level (CISPR25) CISPR 25 : “Radio disturbance characteristics for the protection of receivers used on board vehicles, boats, and on devices – Limits and methods of measurement” 17 Fourier Transform Fourier transform: principle Volt dB Time Time domain measurement Fourier transform Freq (Log) Frequency measurement Invert Fourier transform Oscilloscope Spectrum analyser 18 Fourier Transform Why Frequency domain is so important ? Time domain Frequency domain Only high level harmonics contribution appears Contribution of each harmonic appears Low level harmonics contribution User’s specification FFT 19 Fourier Transform Fourier transform - Example 1 0.35 ou Tr Tr -20 dB/dec 1 T -40 dB/dec FFT 1 Tr 50 % duty cycle trapezoidal signal Period T = 100 ns, Tr = Tf = 2 ns Evaluation of signal bandwidth 20 Emission spectrum Parasitic emission (dBµV) EMC compatible 80 70 Specification for an IC emission Sufficient margin 60 Aggressor IC 50 Measured emission 40 30 20 10 Radiated emission 0 -10 1 10 100 Frequency (MHz) 1000 21 Emission spectrum Low parasitic emission is a key argument FM dBµV 100 Supplier A 80 RF 20 0 10 Not EMC compliant Customer's specified limit 60 40 GSM Supplier B EMC compliant 100 Frequency(MHz) 1000 22 Susceptibility threshold Immunity level has to be higher than customer specification Immunity level (dBmA) 50 Current injection limit Specification for board immunity 40 30 Measured immunity 20 10 Victim IC 0 -10 A very low energy produces a fault -20 -30 -40 1 10 100 Frequency (MHz) 1000 23 Notion of margin Parasitic emission (dBµV) To ensure the electromagnetic compatibility, emission or susceptibility levels have to be lower than a nominal target … …But it is not sufficient to a zero error probability ! Margin are required to compensate unpredictable variations and reduce the error probability. Margin depends on the safety level required in an application domain: Nominal Level Safety margin Process dispersion Measurement error/dispersion Component/PCB/System Ageing Environment Design Objective Domain Lifetime Margin Aeronautics 30 years 40 dB Automotive 10 years 20 dB Consumer 1 year 0 dB 24 Parasitic coupling mechanisms Coupling mechanisms Conducted mode – Common impedance coupling Radiated mode – Antenna coupling The EM wave propagates through the air • Loop : Magnetic field coupling Example : The VSS supply track propagates noise • Wire : Electric field coupling 25 Parasitic coupling mechanisms Crosstalk Parasitic coupling between nearby conductors. Near field coupling ≠ radiated coupling Capacitive crosstalk d t h C Inductive crosstalk dV I C dt w d t C12 dielectric ground C h w dI V L dt L12 dielectric ground 26 Impedance R,L,C vs. frequency Impedance profile of: •50 ohms resistor •100pF capacitor •10nH inductor Z = constant •a real 100 pF SMD capacitor 27 Impedance Passive components – Real model Ceramic capacitor Carbon resistor Inductor Understand EMC issues requires the knowledge of electronic device parasitics 28 Interconnections Interconnect parasitics l PCB Parasitic resistance Parasitic inductance 2a Current R Rdc Rac l l R ac Rdc 2 2a a l 2l L o ln 1 2 a Package Bonding wires Quasi static approximation : If l < λ/20, interconnections are considered as electrically small 29 Interconnections Characteristic impedance • From the electromagnetic point of view: Coaxial line E Z0 H Microstrip line Link to conductor geometry and material properties • From the electric point of view : Z0 R jL G jC lossless conductor L Z0 C Equivalent electrical schematic 30 Interconnections Impedance matching Essential for signal integrity and power transfer Not adapted: the line suffers ringing, insertion losses Adapted: the line is transparent Voltage Voltage time time 31 Interconnections Small conductor Characteristic impedance What is the optimum characteristic impedance for a coaxial cable ? Small conductor Power handling X weight X Low loss x Small capacitance x Small inductance Low Impedance Or ? Large conductor X Bending Ideal values: • Maximum power : Z0 = 32 • Minimum loss: Z0 = 77 x Cable examples: • EMC cable (compromise between power and loss) : Z0 = 50 x x Large conductor • TV cable (minimize Loss): Z0 = 75 32 50 Ω adapted equipments EMC equipments Spectrum analyzer Waveform generator Tem cell Amplifier Gtem 33 3. Origin of Emission and Susceptibility of ICs 34 Two main concepts Susceptibility to EM waves Emission of EM waves Personal entrainments Noise interferences System Equipments Printed circuit boards Components Safety systems Hardware fault Software failure Function Loss 35 EMC at system level Integrated circuits are the origin of parasitic emission and susceptibility to RF disturbances in electronic systems Emission Chip Components PCB System Radiation Noisy IC Interferences Sensitive IC Chip Components Coupling PCB System Susceptibility 36 Source of Electromagnetic Interferences Natural disturbances (cosmic rays, thunder) Radio communications, wireless, radars,… IC Electrical Overstress IC activity Inductive loads, motors 37 Technology trends Technology (log scale) 1m 0.35m 0.25m 0.18m 100nm 0.13m Technology trend costperformance microcontrollers 90nm 0.13µm 45nm 90nm 32nm 45nm 32nm 22nm 5-years gap Technology trend high performance microprocessors 10nm 65nm 18nm 9nm 7nm 22nm Year 1nm 2000 2005 2010 Year 2015 2020 38 Technology trends IC tech. 0.25 µm 0.18 µm 50M 100M 1999 2001 130 nm 90 nm 65 nm Complexity 250M 500M 1G Packaging µC 16 bit µC 32 bit 2003 µC+DSP Flash 2005 2µC+4DSP Mb Flash 2007 Multicore, DSP FPGA, eRam RF multiband 39 Origin of parasitic emission Basic mechanisms for CMOS circuit current: CMOS inverter exemple Switching current VDD IDD (0.1mA) Vin VSS Output capa ISS (0.1mA) IDD (0.1mA) ISS (0.1mA) Time Voltage VOUT Main noise sources comes from AC current sources: Time - Clock-driven blocks, synchronized logic - Memory read/write/refresh - I/O switching 40 Origin of parasitic emission Parasitic emission is linked to voltage drops. The current peak are not the only responsible of emission. Inductance are responsible of the conversion of current peak to voltage drops. Current peaks and voltage drops generate the conducted emission and also responsible of the radiated emission. Vdd i(t) i(t) i(t) 50ps Vss Switching gates Time Vdd Radiated Emission Vss Internal switching noise Voltage drops i V L t 41 Origin of parasitic emission Why technology scale down makes things worse ? Volt • Current level keeps almost constant but: • Faster current switching Old process New process Time Current Stronger di/dt di/dt Old process New process Time Increase parasitic noise 42 Origin of parasitic emission Example: evaluation of switching current in an IC • 0.1 mA / Gate in 100ps • 1 Billion gates (32 Bit Micro) => 100A • 10% switching activity => 10A • Spreading of current peak (non synchronous switching) => 1A in 1ns Ampere Current / gate Ampere Vdd i(t) 1A Vss Current / Ic 0.1 mA time 0.1 ns 1 ns time 43 Origin of parasitic emission Example: evaluation of supply voltage bounce L=0.6nH/mm VDD L=1nH/mm Lead = 10 mm Chip 1 A en 1 ns Evaluate noise amplitude : Lead = 10 mm VSS 44 Origin of parasitic emission Overview of influent parameters on parasitic emission Internal activity of the IC Output load of the circuit Filtering effect interconnections of Vdd IC Filtering effects of PCB tracks and external passive components i(t) i(t) IC Internal interconnexions Vss PCB tracks and external passive components Load IC activity IC 45 Susceptibility issues Less voltage, more IOs 100 200 1000 500 Supply (V) 5.0 Noise margin reduction 3.3 2.5 1.8 1.2 I/O supply 0.7 Core supply 0.5µ 0.35µ 0.18µ Technology 90nm 65nm 45nm 46 Susceptibility issues Multiple parasitic electromagnetic sources Components issues Power HF VHF UHF SHF 1GW xHF THF Radar Météo Radars Satellites 1MW TV UHF 1KW MWave TV VHF Stat. de base Hobby 1W Badge GSM UMTS Hobby 1mW Radar DECT Frequency 3 MHz 30 MHz 300 MHz 3 GHz 30 GHz 300 GHz 47 Susceptibility issues More complex Ics, more levels in susceptibility Electromagnetic wave Software failure Hardware fault System failure µp mixed Function loss 48 Susceptibility issues Desynchronisation issues Jitter is becoming increasingly important in digital design due to rising operating frequencies. The increase of operating frequencies of digital circuits reduces their dynamic margin EMI on supply EMI induced jitter Bit error EMI induced jitter Dynamic failure 49 Origin of IC susceptibility Overview of influent parameters on IC susceptibility Filtering effects of PCB tracks and external passive components Filtering effect interconnections of IC RF interferences Internal perceived noise Vdd Impedance of IC nodes (high Z node = high susceptibility) Non linear effects of active devices (conversion RF signals to DC offsets !) Block own susceptibility (noise margin, delay margin, …) IC Internal interconnexions Vss PCB tracks and external passive components IC active devices IC IC failures 50 Emission / Susceptibility issues Block type Emission Susceptibility Fast digital I/O ++ - Power switch output ++ -- Oscillator / PLL / Clock circuitry ++ ++ Charge pump ++ -- Digital block supply + - Analog input/supply -- ++ DC/DC converter + ++ 51