Transcript Transistors
COMP541
Transistors and all that…
a brief overview
Montek Singh
Feb 8, 2016
1
Transistors as switches
At an abstract level, transistors are merely switches
3-ported voltage-controlled switch
n-type: conduct when control input is 1
p-type: conduct when control input is 0
d
nMOS
pMOS
g=0
g=1
d
d
OFF
g
ON
s
s
s
s
s
s
g
OFF
ON
d
d
d
2
Silicon as a semiconductor
Transistors are built from silicon
Pure Si itself does not conduct well
Impurities are added to make it conducting
As provides free electrons n-type
B provides free “holes” p-type
Figure 1.26 Silicon lattice and dopant atoms
MOS Transistors
MOS = Metal-oxide semiconductor
3 terminals
gate: the voltage here controls whether current flows
source and drain: are what the current flows between
structurally, source and drain are the same
Figure 1.29 nMOS and pMOS transistors
nMOS Transistors
Gate = 0
OFF = disconnect
no current flows
between source & drain
Gate = 1
ON= connect
current can flow between
source & drain
positive gate voltage
draws in electrons to
form a channel
Figure 1.30 nMOS transistor operation
pMOS Transistors
Just the opposite
Gate = 1 disconnect
Gate = 0 connect
Summary:
d
nMOS
pMOS
g=0
g=1
d
d
OFF
g
ON
s
s
s
s
s
s
g
OFF
ON
d
d
d
6
CMOS Topologies
There is actually more to it than connect/disconnect
nMOS: pass good 0’s, but bad 1’s
so connect source to GND
pMOS: pass good 1’s, but bad 0’s
so connect source to VDD
Typically use them in
complementary fashion:
nMOS network at bottom
pulls output value down to 0
pMOS network at top
pMOS
pull-up
network
inputs
output
nMOS
pull-down
network
pulls output value up to 1
only one of the two networks must conduct at a time!
or smoke may be produced
if neither network conducts output will be floating
7
Inverter
NOT
A
VDD
Y
A
Y=A
A
0
1
P1
Y
N1
Y
1
0
GND
A
P1
N1
Y
0
ON
OFF
1
1
OFF
ON
0
8
NAND
NAND
A
B
Y
B
0
1
0
1
A B P1
0 0 ON
0 1 ON
P1
Y
Y = AB
A
0
0
1
1
P2
Y
1
1
1
0
A
N1
B
N2
P2
N1
N2
Y
ON OFF OFF 1
OFF OFF ON 1
1 0 OFF ON ON
1 1 OFF OFF ON
OFF 1
ON 0
9
3-input NOR Gate?
A
B
C
Y
10
2-input AND Gate?
A
B
Y
11
Transmission Gates
Transmission gate is a switch:
nMOS pass 1’s poorly
pMOS pass 0’s poorly
Transmission gate is a better switch
passes both 0 and 1 well
When
A
B
EN = 1, the switch is ON:
A is connected to B
When
EN
EN = 0, the switch is OFF:
EN
A is not connected to B
IMPORTANT: Transmission gates are not drivers
will NOT remove input noise to produce clean(er) output
simply connect A and B together (current could even flow backward!)
use very carefully!
Logic using Transmission Gates
Typically combine two (or more) transmission gates
Together form an actual logic gate whose output is always
driven 0 or 1
Exactly one transmission gate drives the output;
all remaining transmission gates float their outputs
Example: XOR
when C = 0, TG0 conducts
F = A
when C = 1, TG1 conducts
TG0
F = A’
therefore:
F = A xor C
TG1
13
Tristate buffer and tristate inverter
When enabled: sends input to output
When disabled: output is floating (‘Z’)
Implementation:
Tristate buffer using only a pass gate
E
Y
A
If on: output input
If off: output is floating
EN
A
Y
EN
E
0
0
1
1
A
0
1
0
1
Y
Z
Z
0
1
Tristate inverter
Top half and bottom half are not fully
complementary
Either both conduct: output NOT(input)
– will act as a driver!
Or both off: output is floating
14
Power Consumption
Power = Energy consumed per unit time
Dynamic power consumption
Static power consumption
Dynamic Power Consumption
Energy consumed due to switching activity:
All wires and transistor gates have capacitance
Energy required to charge a capacitance, C, to VDD is CVDD2
Circuit running at frequency f: transistors switch (from 1 to 0
or vice versa) at that frequency
Capacitor is charged f/2 times per second (discharging from 1
to 0 is free)
Pdynamic = ½CVDD2f
Static Power Consumption
Power consumed when no gates are switching
Caused by the quiescent supply current, IDD (also called the
leakage current)
Pstatic = IDDVDD
Power Consumption Example
Estimate the power consumption of a wireless
handheld computer
VDD = 1.2 V
C = 20 nF
f = 1 GHz
IDD = 20 mA
P = ½CVDD2f + IDDVDD
= ½(20 nF)(1.2 V)2(1 GHz) + (20 mA)(1.2 V)
= 14.4 W
+
24 mW
= 14.424 W