Transcript Power Amplifier

Power Amplifier
Spring 2005
Beijing Embedded System Key Lab
Linear/Nonlinear PA?
Constant envelop
modulation
Nonconstant envelop
modulation
BPSK
QPSK
QAM
GMSK
FSK
Nonlinear PA
High Efficiency
Linear PA
Low Efficiency
Slide 2
Spectral Regrowth

Effect of nonlinear PA on nonconstant
envelop signal
Spectrum at output of
nonlinear PA
Original Signal
Spectrum
Slide 3
Power Amplifier Efficiency




For ideal PA :
η
Pout
1
Ptotal
The Drain Efficiency
η Drain
PRFout

PDC
The Power Added Efficiency(PAE):
PRFout  PRFin
PAE 
PDC
The overall efficiency:
PRFout
η
PDC  PRFin
Slide 4
Basic Amplification:
Use RFC ( RF Chock) to in a common source stage to drive the load
Slide 5
Matching
Slide 6
Typical PA Performance
Slide 7
Linear and Nonlinear PA

Linear/Nonlinear distinction

The fraction of the RF cycle for which the
transistor conducts.
Slide 8
Stability Consideration
s  1, L  1,
in  S1 1
S S 
 1 2 2 1 L  1,
1  S 2 2L
Ou t  S 2 2 
S1 2 S 2 1s
1
1  S1 1s
Unconditionally Stable :
K  1,   1, where
K 
1  S1 1
2
 S22
2
2 S1 2 S 2 1
 
2
,
  S1 1S 2 2  S1 2 S 2 1
Ps:Stable circle on Smith chart is the general tool
Slide 9
Operating Power Gain
GP 
GP 
GP 

PL
power　delivered　to　load

,
PIN
power　input to　network
1
1  IN
S21
S21
2
1  L
2
1  S 2 2L
(1  L
2
2
)
S  L
(1  1 1
1  S 2 2L
1  S 2 2L
, substitute　IN ,
 S21
2
gp
2
Given the power gain,drawing the power gain circle,and
select

2
2
L
in the stable region.
Calculate In ,determine if a conjugate match is in the
s
stable region.If it’s not stable,we can choose the
arbitrarily,or according VSWR.
Slide 10
Constant VSWR Circle
(VSWR ) in 
a
1  a
1  a
I N  s

,
1  I N s
*
(VSWR ) o u t 
b
 1, where
1  b
1  b
 1, where
o u t  L *

.
1  o u tL
Slide 11
DC Bias Selection
Active bias network for a BJT
Low-noise,low-power : A
Low-noise,higher power-gain : B
High Output Power : C
Higher output power and higher efficiency : D
Slide 12
Power Amplifier Classes

Class A: conduction angle 360

Class B: conduction angle 180

Class AB: conduction angle >180

Class C: conduction angle <180

Class F: an extension of class C

Class E: switch mode

Slide 13
Class A Power Amplifiers

Maximum efficiency of class A PA:
Assume drain(collector) voltage is a sinusoid having Vpp of
2
2Vdd.The power deliver to matching network is VDD / 2Rin.And for
2
Vx to reach 2Vdd,the RFC nust provide a current of VDD / Rin .
Thus, the maximum efficiency is 50%.
Slide 14
Push-pull output stage


The push-pull stage of above usually used in lowfrequency power amplifier.
The efficiency is better than class A PA.
Slide 15
Class A Power Amplifiers
vIN θ 
VDD
RFC
vD θ 
vIN θ 
vOUT θ 
VTH
iOUT θ 
vD θ 
VDD
iD θ 
VDD
RFC
vD θ 
θ
iD θ 
iD θ 
θ
vOUT θ 
iOUT θ 
vOUT θ 
iOUT θ 
0
θ
θ 0
θ
Slide 16
Class A Power Amplifiers

Maximum output power
2
PRFout

2
Vom
VDD


2R
2R
Efficiency
Vom
η Drain
2
2
P
2 R  Vom  1
 RFout 
2
2
PDC
2
VDD
2VDD
R
Slide 17
Class B Stage using a transform
I DD,avg  T2 
T /2 V
DD
0


n 2 RL
sin tdt
(9.1)
The maximum voltage swing at X and Y is 2Vdd,And the
equivalent resistance seen at each of X and Y is n2RL
The total input power of T1 is given by Pin=VDD2/2 n2RL and
Psup=2VDD2/(pn2RL ) .
  Pin / Psup p  p / 4  79%.
Slide 18
Class B, AB Power Amplifiers
VDD
iD 2 θ 
vIN θ 
vD θ 
PRFout
I DC 
η Drain
VT
vOUT θ 
θ
iOUT θ 
iD1 θ 
2
vIN θ 
2
V
V
 om  DD
2R
2R
iD1 θ 
0
vOUT θ 
2I D 2 Vom
1 2π
I
sin
θ
d
θ


D
2π 0
π
π R
2
Vom
0
PRFout
π Vom π
2
R



  0.785
V
2
PDC
4 VDD 4
om
VDD
π R
iD 2 θ 
θ 0
θ
iOUT θ 
0
θ
Slide 19
Class C PAs



M1 turns On if Vin  Vb  VTH .
1
  sin 


The efficiency formula :
4 sin(  / 2)   / 2 cos( / 2)
The power delivered to the load : Pout    sin 
1  cos( / 2)
Slide 20
Ideas for Raising Efficiency


Suppose the matching network is designed such that its input
impedance is low at the fundamental frequency and quite high
at the second harmonics.The drain voltage exhibits sharper
edges than a sinusoid does,raising the efficiency.
But the matching network becomes quite complex and lossy.
Slide 21
Class C Power Amplifier
vIN θ 
VDD
RFC
vD θ 
vIN θ 
VTH
vOUT θ 
θ
iD θ 
iOUT θ 
iD θ 
θ

PRFout 
η Drain
  sin 
1  cos 2 
P
1
  sin 
 RFout 
PDC
4 sin2   2 cos2 
iOUT θ 
vOUT θ 
0
0
θ
Slide 22
High Efficiency PA
Class A
Slide 23
Class E PAs



Class E stages are nonlinear amplifiers that achieve
efficiencies approaching 100% while delivering full power.
It’s a “switching power amplifier”.
The voltage applied to the gate of M1 must approximate a
rectangular waveform.And the switch on-resistance must
be low.
Slide 24
Class E Pas (Cont.)
As the switch turns off,Vx remains low long enough for the
current to drop to zero.
 Vx reaches zero just before the switch turns on.

is also near zero when the switch turns on.
dV
x / dt
 After the switch turns off, the load network operates as a
damped second-order system.

Slide 25
Class E Power Amplifiers
vIN θ 
VDD
vD θ 
vIN θ 
L1
C1
vOUT θ 
iOUT θ 
vD θ 
θ
iD θ 
θ
iD θ 
VDD
vD θ 
L1


C1
Switch mode
Approaching 100%
efficiency
vOUT θ 
iOUT θ 
vOUT θ 
θ
0
Slide 26
Class F PAs


The idea of harmonics termination for a class A stage can be
extened to nonlinear amplifiers as well.
It can be proved that the peak efficiency of class F amplifiers is
equal to 88% for third-harmonics peaking and 85% for for
second-harmonics peaking.
Slide 27
Class F Power Amplifiers
VDD
RFC
vIN θ 
L3
vOUT θ 
vD θ 
vIN θ 
iD θ 
C3
VTH
L1
C1
iOUT θ 
θ
iD θ 
θ


L3C3 tuned to the 2nd or 3rd
harmonics
Peak efficiency
rd harmonics
 88% for 3
peaking
nd harmonics
 85% for for 2
peaking.

vD θ 
vOUT θ 
VDD
0
θ
Slide 28
Power amplifier examples
[*] B. Razavi
Slide 29
Power amplifier examples
[*] B. Razavi
Slide 30
Power amplifier examples
Slide 31
Nonlinear impedance matching


Maximum power transfer does not correspond to maximum
efficiency.
The matching can be obtained roughly using small-signal
approximation, but modifying these for maximum large-signal
efficiency requires a great deal of trial and error.
Slide 32
Large-Signal Impedance Matching


In a “load-pull” test, the output power is measured and plotted
as a function of the complex load seen by the transistor.
As Z1 varies so does Zin ,a second tuer between the signal
generator and the transistor is needed.
Slide 33
Linearization Techniques

Most linear power Amp.


To improve efficiency


Class A of efficiency around %30 to %40 for portable
devices.
Linearization after nonlinear PAs.
Linearization method:




feedford
feedback
envelope elimination and restoration
LINC
Slide 34
Liberalization Technology:
Feedforward
VM  AvVin  VD
VN  Vin  VD / Av
VP  VD / Av , VQ  VD
The suppression of the
magnitude of the IM
products in Vout: E
Vout  AV Vin
E  1  2(1  AA ) cos   (1  AA ) 2
(9.4)
Slide 35
Liberalization Technology:
Feedback
Slide 36
Envelope Elimination
and Restoration
Slide 37
Linearization using non-linear circuits
LINC Technology
(1)
vin (t )  a (t ) cos[ c t   (t )],  (t )  sin 1[a (t ) / V0 ]
v1 (t )  0.5V0 sin[  c t   (t )   (t )]
v2 (t )  0.5V0 sin[  c t   (t )   (t )]
(2)
v1 (t )  vI (t ) cos[ c t   (t )]  vQ (t ) sin[  c t   (t )]
v2 (t )  vI (t ) cos[ c t   (t )]  vQ (t ) sin[  c t   (t )]
vI (t )  a(t ) / 2, vQ (t )  V0  a(t ) 2 / 2
2
Slide 38
v1 (t )  v I (t ) cos( c t   )  vQ (t ) sin(  c t   )
v2 (t )  v I (t ) cos( c t   )  vQ (t ) sin(  c t   )
(9.5)
(9.6)
Slide 39
Limitations of integrated CMOS
Power Amplifier

Device Breakdown Voltage



Low current driving capabilities


Tuning is more difficult
Substrate Coupling with the RF Blocks


Larger device required for a given current
Larger Capacitances


Low voltage swing
Sub-μCMOS process has low oxide breakdown
PA injects more currents into substrate
Lower Q passive elements
Slide 40
Conclusions

CMOS Technology for RF is for applications





Integrated with significant digital circuits
Lowest cost
Moderate radio performance
Accurate RF models are critical for RF
CMOS circuit design
Continuous process improvement enables
CMOS RF capability
Slide 41