Transcript Tutorial 7 (PowerPoint)

Tutorial 7
Derek Wright
Monday, March 7th, 2005
Silicon MOSFETs
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Introduction
MOS Capacitors
MOSFET Structure
MOSFET Scaling
Gate Dielectrics
Gates
Junctions and Contacts
Alternate MOSFET Structures
Introduction
• MOSFETs are a kind of Field Effect
Transistor used in digital ICs
– Use a FET because gate voltage uses less
current than BJT’s base current
• BJT was developed first, and FET was
theorized, but impractical
– Couldn’t make the Field Effect work due to
technology constraints at the time
MOS Capacitor
• It’s important to understand how a MOS
capacitor works:
– Capacitance is a limiting factor in IC
performance
• Mobile charges in gate
• Mobile charges in channel (between drain
and source)
• Separated by dielectric (gate oxide)
= capacitor
MOS Capacitor
MOS Capacitor
• http://jas.eng.buffalo.edu/education/mos/m
osCap/biasBand10.html
– Shows how a depletion layer forms
– The blue charge is what lets current go from
source to drain
– Other good applets on the site
MOS Capacitor
MOS Capacitor
• Capacitance changes
with applied voltage
• Leads to complicated
CMOS simulations
• Can be exploited in
some kinds of VCOs
(MOS Varactor)
MOSFET Structure
• We use a MOS capacitor in inversion
mode
• The minority carriers form the “channel”
• Ions are implanted on either side of the
gate to act as sources of carriers
• Contacts are put on the diffusions to form
the source and drain
• Carriers go from the source to the drain
MOSFET Structure
MOSFET Structure
MOSFET Structure
MOSFET Scaling
• Reducing the size of MOSFETs in ICs has
many benefits:
– Higher density
– Higher speed
– Lower Power
• It also introduces many problems:
– Thin gate oxides
– Short channel effects
– Higher leakage current
MOSFET Scaling
Gate Dielectrics
• Gate thickness scales by
1/ with decreasing
device dimensions
• We’re fast approaching
the practical limit of how
thin SiO2 gates can get
• Tunneling can occur
causing gate leakage
• Other problems like hot
carriers start to become
problematic
Gate Dielectrics
• We can use a thicker
dielectric if it has a higher
r
• These “high-k” dielectrics
mean that a given gate
voltage will produce a
higher E-field
• Or, a given gate voltage
will produce the same Efield with a thicker
dielectric layer
Gate Dielectrics
• Problems with a thin gate:
– Oxide thickness variation
– Impurities from poly gate (particularly B)
– Reliability and lifetime problems
– High gate current
• Gate leakage current (VG = 1V):
– 1pA/cm2 at 3.5 nm
– 10A/cm2 at 1.5 nm
Gate Dielectrics
Gate Dielectrics
• Solutions to gate problems:
– Add nitrogen to SiO2
– Use high-k dielectrics
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High-k dielectrics must meet a number of criteria
Must be thermally stable
Good electronic properties
Microstructural stability
Deposition tools and chemistry
Process compatibility
Gate Dielectrics
Gates
• Poly-silicon is used for gates because:
– Adjustable work function through doping
– Process compatibility
• Drawbacks include:
– It’s a semiconductor, so it forms a depletion layer
which adds to the EOT (effective oxide thickness)
– High resistivity
• Metal is considered as the successor to polysilicon gates
Gates
Junctions and Contacts
• Other resistances must be less than 10%
of the channel resistance (Rchan)
• Rchan = [(W/L)  (ox/tox (VG – VT)]-1
– L  Rchan (scaling)
–   Rchan (new substrates)
– ox  Rchan (high-k dielectrics)
– tox  Rchan (high-k dielectrics and scaling)
– VT  (VG – VT)   Rchan (doping)
Junctions and Contacts
• Contacts connect the metal lines to the
source/drain/gate of a MOSFET
• Contact resistance becomes a problem as
geometries shrink
• This can be partially solved by using
silicides:
– Silicides are metal/silicon alloys with a low
resistance
Junctions and Contacts
• Formation of selfaligned silicides
(salicides)
• Metal is deposited
over entire wafer
• Reacts with exposed
silicon
• Unreacted metal is
selectively etched off
Alternate MOSFET Structures
• Silicon On Insulator (SOI) wafers eliminate
capacitive coupling to the substrate
• An oxide layer is buried below the transistors,
eliminating coupling to the substrate
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reduces leakage
reduces capacitance
higher speed
less susceptible to soft errors
Alternate MOSFET Structures
• New technologies for coming years:
– High-k gate dielectrics
– Low-k Dielectrics
– Metal gate electrodes
– SOI
– Strained silicon
– Vertical multi-gate structures
Thank You!
• This presentation will be available on the
web.