Transcript Fast Fault Finder

Fast Fault Finder
A Machine Protection Component
Module description
• A VME module designed by Bill Ross to be used as a machine
protection component in the L-Band Test Station.
• It uses Xilinx XC4VXS35 FPGA as a core logic IC.
• A system of multiple modules will be used to protect both the
Modulator and the RF system.
• The system will monitor modulator voltage and current, RF power,
oil and water temperatures, etc.
• Contains 4 “Fast” ADC channels sampled at 10MHz rate.
• Contains 10 “Slow” ADC channels sampled at 2KHz rate.
• All ADC’s are 12 bit (-2047 to +2048).
• RF fault in and out signal connectors are on the front panel.
• Modulator fault in and out signal connectors are on the front panel.
Module description, continued
• Trigger in signal connector is on the front panel.
• Transition module has a DB25 connector for “slow” signals.
• Fast signal history buffer can hold 43008 samples per channel.
Buffer wraps around after 4.3 ms.
• Slow signal history buffer can hold 2048 samples per channel.
Buffer wraps around after 1.024 s.
• Capability, control, and status registers are located in a
Configuration Rom space.
• Data memory maps to A32 memory space.
• RORA interrupts are implemented and up to 9 different interrupt
sources can be enabled.
Fast Fault Finder and Transition Modules
Fast Fault Finder Module Test Setup
FFF Device Driver Overview
• The software consists of the following:
– drvFFF.h contains global routine prototypes, definitions of some types,
and definitions which lay out the module’s registers.
– devFFF.c contains definitions of routines which handle all details of
Epics record device support. Support for the following is implemented:
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ai and ao, for reading and writing the gain control registers.
bi and bo, for bit level IO to/from control and status registers.
longin and longout, for integer level IO to/from control and status registers.
mbbo, for implementing menu based choices.
stringin for reading short text.
stringout is used to implement a general purpose register IO widget, where
one can specify a register offset and read from it, or specify register offset
and a value to write to it.
• mbbiDirect is used for displaying contents of status registers in bit format.
• mbboBits is used for manipulating contents of control registers on bit level.
• waveform is used for reading data from the history buffers.
FFF Device Driver Overview, continued
– drvFFF.c contains data structures where configuration data for all
defined FFF modules are kept, routines for register IO, routines for
reading data from history buffers, and routines for handling interrupts.
– drvFFF.dbd contains all device and driver definitions.
• The device driver code is implemented using Epics OSI routines.
Modifications to Epics and vxWorks distributions were needed to be
able to handle the FFF module’s VME addressing implementation.
Support for the Configuration Rom mapping needed to be added.
Procedure developed by Eric Bjorklund was followed.
• Access from devFFF.c code to routines in drvFFF.c is regulated
using Epics Mutexes.
Device Support Functions
• Most functions are simple, where the epics record is used to either
get or put a scalar value or an array of values from or to the
hardware.
• Some functions are complex. An example of implemented complex
functions is get or put a configuration string. This is associated with
a waveform record. The get function formats a predefined list of
register values into an ASCII string. The put function does the
inverse of that.
• More complex functions may be added as needed.
Interrupt Handling
• Interrupts can be generated by various events. Of most interest are:
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Caused by an external trigger.
Caused when history buffer recording stops.
Caused when a fault condition occurs.
Caused by a Hardware fault.
Interrupt Handling Implementation
• Interrupt Service Routine (ISR) does the following:
– Reads the Interrupt Status Register (ISREG), this deactivates the IRQ
line. (This is a RORA interrupter).
– Stores the value from ISREG to be used by the callback routine.
– Schedules a callback routine to be invoked, which continues handling
the interrupt in normal processing context.
• Interrupt callback routine executes at low priority and does the
following:
– Uses the stored value of ISREG and reads other status registers to
determine what should be done and does it.
– Passes information to the devFFF.c routines to perform record scan as
needed.
Some EDM screens
Another EDM Screen
Typical Noise
Waveform Threshold Setup Panel
Status Registers
Final Comments
• Presently the driver code is used with a FFF module testing and
debugging IOC program.
• The device driver has all the primitive routines needed for testing.
When the testing of these modules is complete, the software version
will get frozen.
• The new version will be enhanced further to include some, yet to be
designed, higher level functionality which might be needed when
these FFF modules are integrated into the L-Band controls system.
• Without DMA, it takes about 77 ms to transfer all data from one
module to local memory. The calculated data transfer rate is 5.1
Mbytes/sec.
• The L-Band station will be cycled at 5 Hz frequency.
• With DMA it should be quite possible to transfer all data from all
three modules between triggers.