Transcript Titel und Thema des Vortrages

IP ’07
Panel: Is networking the solution for
interconnect design closure?
Dr. Miloš Krstić
IHP
Im Technologiepark 25
15236 Frankfurt (Oder)
Germany
IHP Im Technologiepark 25 15236 Frankfurt (Oder) Germany
www.ihp-microelectronics.com
© 2007 - All rights reserved
GALAXY project
•
GALAXY project (GALS InterfAce for CompleX Digital SYstem
Integration) will be funded in the FP7 program of EU
IHP Im Technologiepark 25 15236 Frankfurt (Oder) Germany
www.ihp-microelectronics.com
© 2007 - All rights reserved
Project goals
• This project builds on a technology approach in which the EU
currently has world leadership
• We will provide an integrated GALS NoC design flow
• We will provide an interoperability framework between the
existing open and commercial CAD tools
• The project will evaluate the ability of the GALS approach to
solve system integration issues,
implement a complex GALS system on 45nm CMOS process,
explore the low EMI and low-power properties,
and robustness to process variability problems.
IHP Im Technologiepark 25 15236 Frankfurt (Oder) Germany
www.ihp-microelectronics.com
© 2007 - All rights reserved
GALS and NoC
•
GALS represents an interesting vehicle for NoC concept
Asynchronous wrapper
Asynchronous wrapper
Req
Synchronous
block 1
Ack
Synchronous
block 2
Data
Data
Network
Node
Network
Node
Network
Node
Synchronous
block 3
Asynchronous wrapper
IHP Im Technologiepark 25 15236 Frankfurt (Oder) Germany
www.ihp-microelectronics.com
© 2007 - All rights reserved
GALS NoCs – Pros/Cons
•
Pro
Clock-skew problems avoided
Potentials for power saving (50% power in NoCs is spent to clock net)
The synchronous design of NoC nodes at their optimum clock frequency
Possibilities for variation-tolerant on-chip interconnection schemes
Low-EMI property
•
Con
Lack of convincing analysis and exploration frameworks,
crossbenchmarking with synchronous solutions,
proven robustness against nanoscale physics effects,
tool support
IHP Im Technologiepark 25 15236 Frankfurt (Oder) Germany
www.ihp-microelectronics.com
© 2007 - All rights reserved
NoC activities in GALAXY project (I)
•
There are already a few NoC platforms based on the GALS
paradigm (Silistix, LETI, Technion, Technical University of
Denmark)
•
We will support a number of GALS NoC architectural
solutions
•
We will also show how the use of NoCs helps designers to
overcome the reliability issues of future technologies.
IHP Im Technologiepark 25 15236 Frankfurt (Oder) Germany
www.ihp-microelectronics.com
© 2007 - All rights reserved
NoC activities in GALAXY project (II)
•
The full potentials of dynamic voltage and frequency scaling
with GALS NoC designs will be explored
•
We will create a link between high-level tooling for GALSbased system design and the NoC backend synthesis flow,
creating with a complete automated synthesis flow for GALS
NoCs
•
A mature synchronous NoC architecture (xpipes) will serve as
the reference infrastructure for migration to the GALS
paradigm
IHP Im Technologiepark 25 15236 Frankfurt (Oder) Germany
www.ihp-microelectronics.com
© 2007 - All rights reserved