Transcript Physics 121
Physics 413 Chapter 1: Introduction to the HCS 12 Microcontroller Computer Architecture • What is a Digital Computer ? A computer is essentially a fast electronic calculating machine. • What is a program ? A program is a set of very simple instructions that a computer can understand. Examples of simple instructions are ADD two numbers, Is X > Y?, COPY A into the memory. • What is Machine Language ? The set of exceedingly simple and primitive instructions that a computer can understand is called the Instruction Set or Machine Language. Architecture and Organization • Computer Architecture deals with the design of those components of a computer that are accessible to a programmer. For instance, the Motorola 6800 does not have a MUL instruction but the Pentium does. • Computer Organization deals with the implementation of the architecture and may be transparent to the programmer. For instance, precisely how is MUL implemented in the hardware? Levels of Abstraction • L5 High-level Language (C++, Java) • L4 Assembly Language • L3 Operating System • L2 Instruction Set Architecture (ISA) • L1 Microarchitecture Level • L0 Digital Logic Level • Transistors A Brief History of Computers • First Generation - Vacuum Tubes - 1945-1955 ENIAC (Electronic Numerical Integrator and Computer) had 18,000 Vacuum Tubes, 1500 relays and weighed 30 tons • Second Generation - Transistors - 1955-65 - PDP -8 (DEC) • Third Generation - IC - 1965-80 - IBM 360 • Fourth Generation - VLSI - Intel and AMD Processors Moore’s Law The number of transistors on a chip doubles every 18 months All about microprocessors and microcontrollers • ROM is where the program that initializes the PC is stored. • RAM access is fast • ADDRESS BUS carries the address of RAM, ROM, and other peripherals • HCS12 has 16 multiplexed address and data lines • DATA BUS carries data back and forth between the microprocessor and RAM, ROM, and other peripherals. Memory • Big Endian: 4 bytes arranged as:0123 (32-bit word) • Little Endian: 4 bytes arranged 3210 (32-bit word) • • • • • DRAM Organization nxn matrix structure is popular for large memory sizes RAS - Row Address Strobe CAS - Column Address Strobe RAS - CAS strategy reduces the number of pins but slows down access because two addressing cycles are required • SRAM Fast for cache ROM • ROM • PROM • EPROM - UV erasable • EEPROM - Electrically erasable byte at a time • FLASH - electrical block erasable - digital film - more like RAM! HCS12 Data Sheet http://www.freescale.com/files/microcontrollers/doc/data_sheet/H CS12DFAMILYPP.pdf HCS12 Architecture A B A+B=D X Y SP PC CCR Straight-line Programming In Paris they simply stared when I spoke to them in French ; I never did succeed in making those idiots understand their own language Mark Twain , The Innocents Abroad, 1869 My First Program CLRA INC A SWI Clears accumulator A ( A = 0 ) This instruction does this: A + 1 Stop (software interrupt) A Op-codes Assembly Language CLRA INCA SWI Memory Location 2000 2001 2002 Op-codes 87 42 3F My Second Program LDAA # $ 12 ADDA # $ 15 SWI Object Code . . . Program # 2 Assembly Language Memory Location Op-codes LDAA # $ 12 2000 2001 86 12 ADDA # $ 15 2002 2003 8B 15 SWI 2004 3F Addressing Modes Inherent (implied) : Simplest with no operand. One-byte op-code. Examples: INCA and CLRA Immediate : Operand specified is immediate (no memory access). Examples: LDAA # $ 12 and ADDA # $ 15 Immediate and Direct Modes Immediate LDAA # $ 12 op-code 86 12 Load the hex number 12 Direct LDAA $ 12 op-code 96 12 Load from memory location 0012 My Third Program Assembly Language LDAA # $ 04 STAA $ 15 LDAA # $ 08 ADDA $ 15 SWI Memory Location ? Op-codes ? My Third Program Assembly Language LDAA # $ 04 STAA $ 15 LDAA # $ 08 ADDA $ 15 SWI Memory Location 2000 2002 2004 2006 2008 Op-codes 86 97 86 9B 3F 04 15 08 15 Extended Addressing Mode The extended addressing mode becomes indispensable when memory locations beyond the zero page must be addressed. [This is the case for the HCS12 on the Dragon12 Board in the lab] Here, as always, an example is worth a thousand words: LDAA $3C5E Load A from memory location 3C5E Op-codes B6 3C 5E Three Trick Questions What is the outcome of B6 00 2A ? What is the outcome of LDAA # $ 3C5E ? What is the outcome of STAB $3C44 ? Trick Questions . . . Answered! What is the outcome of B6 00 2A ? Legal but not very smart. What is the outcome of LDAA # $ 3C5E ? Not Legal What is the outcome of STAB $3C44 ? O.K. and op-code is F7 3C 44 Index Register X is a 16-bit register How are the following three instructions different? LDX # $ 5C42 LDX $ 5C42 LDX $ 5C Index Register LDX #$ 5C42 The number 5C42 is loaded into X LDX $ 5C42 Numbers from 5C43 and 5C42 loaded LDX $ 5C Numbers from 005D and 005C loaded Indexed Addressing Mode LDAA 0,X loads accumulator A with the contents of the memory location pointed to by the index register X. LDAA 4,X loads accumulator A with the contents of the memory location pointed to by X+4 Transfer and Exchange! TFR D,X transfers the contents of D to X TFR X, B transfers bits 0-7 of X to B EXG A,B swaps A and B Move it! Memory to memory transfer movb $1000,$2000 copies the (8-bit)contents of memory location $1000 to the memory location $2000 movw 0,X,0,Y copies the 16-bit word pointed to by X to the memory location pointed to by Y. Examples Galore ADDA The outcome is A + M ADDA # $ 2B 8B 2B ADDA $ 3C 9B 3C ADDA $ 5B24 AB 5B 24 A Carry Bit in CCR ADCA The outcome is A + M + C A Use this instruction when expecting a carry. Incidentally, CLC will clear the carry bit. Indexed Addressing Mode LDX # $ 0050 LDAA 0,X ADDA 1,X SWI Program adds two numbers stored in memory locations 0050 and 0051 D-bug12 Assembler ASM 2000 Begin assembly at address 2000 End Assembly LOAD Load S-Records into memory MD Memory Display MM Modify Memory RD Display CPU registers RM Modify CPU Register Contents PC 2000 loads 2000 into PC T Trace (single-step)