Transcript Unit 2 PowerPoint Slides

EET 2261 Unit 2
HCS12 Architecture
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Read Almy, Chapters 3, 4, and 5.
Homework #2 and Lab #2 due next
week.
Quiz next week.
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CPU Programming Model
Inside any processor’s CPU are certain registers
that the programmer has access to.
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The list of these registers is often called the CPU
programming model.
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For the HCS12:
Register
Number of bits
Accumulator A
8
Accumulator B
8
Accumulator D
16
Index Register X
16
Index Register Y
16
Stack Pointer
16
Program Counter
16
Condition Code Register
8
HCS12 CPU Programming Model
•See page 30
of textbook or
page 375 of
CPU Reference
Manual.
Purposes of the Registers
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Accumulators A, B, and D are general-purpose
registers that the programmer can use however she
wants.
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PC and CCR are special-purpose registers that
always perform specific functions:
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PC always holds the address of the next
instruction to be executed.
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CCR always holds three mask bits and five
status flags.
The other registers (X, Y, and SP) sometimes serve
as general-purpose registers and sometimes
perform specific functions.
Accumulators A, B, and D
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The HCS12 has two 8-bit accumulators,
named A and B. These two can also be
regarded as forming a single 16-bit
accumulator named D.
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Some instructions operate on Accumulator A
or Accumulator B. Other instructions operate
on Accumulator D.
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Examples:
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LDAA loads an 8-bit number into A.
LDAB loads an 8-bit number into B.
LDD loads a 16-bit number into D.
HCS12 Instruction Set
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A processor’s instruction set is the list of
instructions (or commands) that the CPU
recognizes.
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Most of these instructions manipulate the
CPU’s registers or locations in memory (or
both).
Instruction Set Summary
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For a summary of the HCS12’s instruction
set, see the table on pages 381-394 of the
CPU Reference Manual.
Example: ABA
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This table uses many abbreviations and
special symbols. They’re all explained in
the pages before the table (pages 377-380
of the CPU Reference Manual.)
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Let’s look at one instruction, ABA, which
adds Accumulator B to Accumulator A and
puts the results in Accumulator A.
First Column: Source Form
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This column shows how
you’ll type the instruction
when you start writing
assembly language programs next week.
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ABA is very simple. Other instructions are
more complicated and have additional
things you need to type, explained here:
Second Column: Operation
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This column explains
the operation that the
instruction performs.
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Some symbols used in this column:
Third Column: Addressing Mode
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This column shows the addressing
mode(s) used by the instruction.
As we’ll see below, there are
six different addressing modes.
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Some abbreviations used in this column:
Fourth Column: Machine Coding
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Computers use numbers to
represent all kinds of
information, including the
instructions in a program.
This column shows the numbers (in hex)
that represent each instruction.
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Some abbreviations used in this column:
Fifth Column: Access Detail
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This column shows how
many cycles each
instruction takes to
execute, and what happens during each of
those cycles.
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Some abbreviations used in this column:
Last Two Columns: Condition
Codes
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These columns show how
each instruction affects the bits
in the Condition Code Register.
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Symbols used in these columns:
Summary
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This table summarizes a lot of useful
information for every one of the 207
instructions that you can use when writing
programs for the HCS12.
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You’ll refer to this table often.
Instruction Set Details
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For details on
all 207 of the
HCS12’s
instructions,
see pages
100-309 of
the CPU
Reference
Manual.
RISC Architecture versus CISC
Architecture
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Some commercially available microprocessors
use a RISC (Reduced Instruction Set
Computer) architecture.
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Small instruction set (maybe 25 or 30 instructions).
Each instruction performs a simple operation and
executes quickly.
The HCS12 is an example of a CISC
(Complex Instruction Set Computer)
processor.
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Large instruction set (207 in the HCS12’s case).
Some instructions perform complex operations that
might require a dozen or more instructions in a
RISC processor.
Categories of Instructions
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The Instruction Set Summary table lists
instructions alphabetically. Sometimes it’s
more useful to have instructions grouped
into categories of similar instructions.
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Examples of categories:
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Load and Store Instructions
Addition and Subtraction Instructions
Boolean Logic Instructions
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See Section 5 (starting on p. 55) of the CPU
Reference Manual.
Mnemonics
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In this course we’ll write programs in a
language called assembly language.
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Assembly language contains many
mnemonics, which are abbreviations for
actions that we want to perform.
(Mnemonics appear in the Source Form
column of the Instruction Set Summary.)
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Some examples:
Mnemonic
Action
ABA
Add Accumulator B to Accumulator A
LDAA
Load Accumulator A with a number
STAA
Store Accumulator A into memory
Operands
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Some HCS12 instructions require the
programmer to specify one or two
operands, in addition to the mnemonic.
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These operands are the data (usually
numbers) to be operated on.
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Example:
• The LDAA instruction loads some
number into accumulator A. The number
that’s to be loaded is the operand.
• In the instruction LDAA #5, the operand
is 5.
Opcodes
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When an instruction is translated into
machine code, the mnemonic is replaced by
an opcode.
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Example: The assembly-language
instruction
LDAA #5
Mnemonic
becomes
Operand
$8605
Opcode
in machine code, because $86 is the
opcode for LDAA.
Review: Memory Addresses
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Every computer system has memory, where
programs and data are stored.
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Each location within this memory has an address
by which we identify it. And each location holds
some contents, which is one byte.
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The HCS12 uses a 16-bit address bus.
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So the addresses of its memory locations range
from $0000 to $FFFF. (In decimal, that’s 0 to
65,535.)
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So we have 65,536 memory locations, each of
which holds one byte.
Review: Memory Map
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Programmers must pay attention to where in
memory their programs and data are stored.
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Some of a system’s memory is reserved for
special purposes. Therefore, within the range
of possible addresses, only some can be used
by your programs.
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A memory map shows which memory
addresses are reserved, and which are
available for your use.
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Next slide shows memory map for our HCS12
chip.
HCS12 Memory Map
•See page 26 of
Device User
Guide.
•Reserved
addresses:
•$0000 to $03FF are
reserved for specialfunction registers.
•$FF00 to $FFFF are
reserved for interrupt
vectors.
Addressing Modes
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Every instance of an instruction uses an
addressing mode.
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The HCS12’s six addressing modes are:
• Inherent
• Immediate
• Direct
• Extended
• Indexed (which has several variations)
• Relative
Which Addressing Mode(s) Does
an Instruction Use?
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Some instructions come in only one “flavor”:
they can only use one addressing mode.
• Example: The ABA instruction always
uses the inherent addressing mode.
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Other instructions come in two or more
“flavors.”
• Example: The LDAA instruction can use
immediate, direct, extended, or indexed
addressing.
Inherent Addressing Mode
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In inherent addressing mode, the
programmer doesn’t specify any operands,
because the mnemonic itself contains all of
the information needed.
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Example: The ABA instruction adds the
numbers in Accumulators A and B. So we
already know where the two operands are
located, and we don’t need to say any more.
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We just write ABA, instead of writing
something like ABA #5.
Immediate Addressing Mode
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In immediate addressing mode, the
programmer gives the operand(s) as part of
the instruction.
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The pound sign (#) indicates immediate
addressing.
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Example: LDAA #15 causes the number 15
to be loaded into Accumulator A.
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The following are all equivalent:
• LDAA #15
• LDAA #$F
• LDAA #%1111
Direct Addressing Mode
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In direct addressing mode, the programmer
gives the operand’s address as part of the
instruction.
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Example: LDAA 51 causes the number
located at memory address 51 to be loaded
into Accumulator A.
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The following are all equivalent:
• LDAA 51
• LDAA $33
• LDAA %00110011
Limitation of Direct Addressing
Mode
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In direct addressing mode, the operand’s
address can only be one byte long.
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So the highest address we can use with
direct addressing is $FF, or 255.
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Since there are 65,536 locations in memory,
this means that 65,281 of those locations
can’t be reached by direct addressing!
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Solution: use extended addressing mode
instead of direct addressing mode. (See
next slide.)
Extended Addressing Mode
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In extended addressing, the programmer gives the
operand’s address as part of the instruction (just as
in direct addressing). But this address is two bytes
long, so we can reach any memory location.
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Example: LDAA $701F causes the number located
at memory address $701F to be loaded into
Accumulator A.
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The following are all equivalent:
• LDAA 28703
• LDAA $701F
• LDAA %0111000000011111
Summary: Addressing Modes
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We’ve discussed the first four of the
HCS12’s six addressing modes:
• Inherent
• Immediate
• Direct
• Extended
• Indexed (which has several variations)
• Relative
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We’ll discuss the other two modes in the
weeks ahead.
Condition Code Register
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The Condition Code Register (CCR) is an 8bit register that contains:
• 5 flag bits (H, N, Z, V, C)
• 2 interrupt mask bits (X and I)
• STOP instruction control bit (S)
Meanings of the H, Z, and C Flag
Bits
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The flag bits are set or reset based on the
results of previously executed instructions.
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H=1 if a half-carry (carry from bit 3 to bit 4)
occurred.
Z=1 if the result was zero.
C=1 if a carry out of the leftmost bit
occurred (or, in the case of subtract
instructions, if a borrow into the leftmost bit
occurred).
But only some instructions affect these flag
bits: check the instruction summary table.
Review: Two’s-Complement
Notation
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Recall that two’s-complement notation is
the standard way of representing signed
numbers in binary.
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In this notation, the leftmost bit is the sign
bit.
• Sign bit = 0 for positive numbers or 0.
• Sign bit = 1 for negative numbers.
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Examples, using 8 bits:
• %0000 0011 = 3
• %1000 0011 = 125
Meanings of the N and V Flag Bits
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N=1 if the result’s leftmost bit (MSB) was
1. If you’re using signed numbers, this
means that the result was negative.
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V=1 if a two’s-complement overflow
occurred. This happens when either:
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We added two positive numbers (MSB=0) and
got a negative result (MSB=1).
Or we added two negative numbers (MSB=1)
and got a positive result (MSB=0).
Again, only some instructions affect these flag
bits: check the instruction summary table.