Transcript CISC vs. RISC…AGAIN!!! - Department of Computer Science

CISC…AGAIN!!!
(and a bit o’ RISC, too)
by Javier Arboleda
Agenda
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Brief History
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An example of “Closing the semantic gap”
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Drawbacks of CISC
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Interesting RISC vs. CISC stuff
CISC’s Roots
Back in the 70’s memory & software = $$$
Hardware… not so much $
 Move burden of code from software &
memory to hardware
 “Closing the semantic gap”
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Department of Redundancy Department
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So, to reiterate, CISC architecture type
was created to :
 Reduce
software developing costs by making
compilers easier to write and code easier to
debug
 Reduce calls to memory, thus making it
possible to do more with less memory which
at the time was the most expensive part of a
computer system
Exempli Gratia = E.G. != I.E.
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Let’s pretend that…
H
is the name for a high-level language. This
language has a function Cube() which will
cube an integer
 H compiler translates code into assembly
language for the A-1 computer, which only
has two instructions
A-1 Computer Instructions
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Move [destination register, integer or source register]
This instruction takes a value, either an integer or the contents of
another register, and places it in the destination register. So Move [D,
5] would place the number 5 in register D. Move [D, E] would take
whatever number is stored in E and place it in D
Mult [destination register, integer or source register]
This instruction takes the contents of the destination register and
multiplies it by either an integer or the contents of the source register,
and places the result in the destination register. So Mult [D, 70]
would multiply the contents of D by 70 and place the results in D.
Mult [D, E] would multiply the contents of D by the contents of E,
and place the result in D
Pre-CISC example
Statements in H
1.A = 20;
2.B = Cube(A);
Statements in Assembly
for A-1 computer
1.Move [A, 20]
2.Mult [A, A]
3.Mult [A, A]
4.Move [B, A]
Here it takes four statements in the A-1 assembly to do the work of
two statements in H since the A-1 computer has no instruction for
taking the Cube of a number
Three possible problems
1.
2.
3.
If the program H uses Cube() many times, then
assembly code will be relatively larger, which is
bad for the A-1 computer that has very little
memory
With computer speeds being so slow, compiler
takes a long time to translate all of the Cube()
statements to multiple Mult[] instructions
Programming in assembly language would be
time consuming, tedious, and difficult to debug
How does CISC solve this problem?
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Include a Cube instruction in the instruction set
of the next generation of computers, A-2
Cube[destination register, source register] This
instruction takes the contents of the source
register and cubes it. It then places the result in
the destination register. So Cube [D, E] takes
whatever value is in E, cubes it, and places the
result in D
Post-CISC example
Statements in H
1.A = 20;
2.B = Cube(A);
Statements in Assembly
for A-2 computer
1.Move [A, 20]
2.Cube[B, A]
 One-to-one correspondence between H and assembly
code
 “Semantic gap” is closed
 Complexity has moved from the software level to the
hardware level
Result
 Compiler
does less work to translate
 Less memory needed
 Easier to debug
Drawbacks
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When using an instructions set with so many instructions,
the decode function of the computer system must be able
to recognize a wide variety of functions. As a result, the
decode logic, while time critical for purposes of
performance, grows to be quite complex
Not every one of the complex instructions are used for
each software program, and thus much of the decode
logic functionality is seldom used during operation
Another problem arises from the fact that the complex
instructions are often of different lengths, i.e., each
instruction could consist of any number of operands and
takes any number of cycles to execute
Here comes the 80’s and a….
Birth of RISC & CISC???
RISC = Reduced instruction set computer
 Previous to RISC, CISC was not called
“CISC,” it was just the “really good way to
do things computer” or RGWTDTC (just kidding)
 The term “complex instruction set
computer” was forced upon anything else
that was not RISC
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Bloody hell, it’s
obvious that RISC
and pointy hats are
the future, mate!!!
Pipelining… BRILLIANT!!
RISC = GOOD!!!!
CISC = BAD!!!
RISC > CISC
Are you ready to rumble?
CISC
RISC
VS
Warning, Geeky Conspiracy Theory Ahead
CISC + Pipelining = i486
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CISC chips started using pipelining with the Intel
i486 processor. Now what, RISC?!?
Several years later Apple starts using the G3
(third generation PowerPC processors)
This was a RISC chip which actually had more
instructions than Intel’s Pentium II CISC
processor!
Hold up, Isn’t RISC suppose to have a reduced
number of instructions? Isn’t that why RISC is
so much better than CISC?
RISC’s people: “What we meant…”
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Proponents of RISC started to claim that the
actual number of instructions was never
intended to be reduced; rather, only the
individual instructions themselves were to be
reduced in cycle time and complexity
All the hoopla was speculated to have been
generated from Apple’s camp and users who
must insist that the processors in their Macs are
pure RISC chips, since
RISC = GOOD!!!!
CISC = BAD!!!
RISC > CISC
10 Years
The argument about RISC being so much
better than CISC starts to quiet down, and
why?
What announcement did Apple make in
2005?
No more
PowerPC for
Apple,
Now it’s all
about Intel!
Brilliant!!
Hilarious!!
In Conclusion…
CISC chips dominate the personal
computer market
 Line between RISC and CISC continues to
blur
 The RISC > CISC || CISC > RISC debate
is unheard of

Thank you!
Sources
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http://arstechnica.com/cpu/4q99/risc-cisc/rvc-1.html
http://www.amigau.com/aig/riscisc.html
http://www.pcguide.com/ref/cpu/arch/int/instComplexityc.html
http://en.wikipedia.org/wiki/Complex_instruction_set_co
mputer
http://en.wikipedia.org/wiki/RISC
http://en.wikipedia.org/wiki/X86
http://en.wikipedia.org/wiki/PowerPC