Transcript File - Can You Compute?

RISC VS CISC
WHAT HAVE MR ALDRED’S DIRTY CLOTHES GOT TO
DO WITH THE CPU
FOLDING A T SHIRT
1. You work in a Tokyo Laundry and there is loads of dirty
laundry that needs to be washed, dried, and folded
2. It takes the washer for 30 minutes,
3. Drying takes 40 minutes,
4. Folding the clothes takes 20 minutes
5. Then pick up the second load and wash, dry, and fold,
and repeat for the third and fourth loads and firth loads.
6.
Supposing we started at 18:00 and worked as efficiently
as possible, what time would you finish?
• What is the finish time?
• Create a diagram that shows this
WHAT DOES A PROCESSOR DO?
HIGH LEVEL LANGUAGE TO MACHINE CODE
1. We program in High Level Languages e.g. C++.
2. The CPU deals with machine code.
3. We need a compiler to convert from our High LL to an Assembly
language which in turn is ‘Assembled’ into Machine Code. (LMC)
4. The complexity of the code the CPU can handle is higher for a
CISC processor than a RISC processor.
5. The more we break a program down into smaller steps the
longer the code gets.
6. The Python interpreter is a program which is compiled
to machine code (i.e. bit patterns). When that program runs it
interprets (i.e. decodes and executes) your Python program.
RISC
Reduced instruction set computing
Simple instructions are faster to process
What do these complex instruction do?
Take this number and store it
If the number that is loaded into the accumulator is equal to
zero then break the loop
Make this more complex
Open the door
Stand up
RISC
1. Reduced Instruction Set Computer
2. Simple hardware
3. Further away from high level languages
4. Longer code requiring more RAM
5. Compiler has to do more work
6. Every operation takes place in one clock cycle.
CISC
1. Complex Instruction Set Computer.
2. More complex hardware
3. Closer to High Level Language
4. Less work for the compiler to do
5. Smaller code requiring less RAM
6. Some instructions take multiple clock cycles to
complete.
CONSIDER HOW TO ADD TWO NUMBERS
• Load the first number from RAM into a register
• Load the second number from RAM into a
register
• Add them together
• Store the answer in a register.
2+3=?
WHY USE RISC PROCESSORS THEN ?
• The physical construction of RISC chips is simpler.
They need less complicated circuitry as they
perform fewer instruction types.
• Therefore they can be made…
• Smaller
• To use less power
• To generate less heat
SPEED
• If we look at a single Fetch-Execute cycle a CISC
processor would appear to be much faster as it
only has to fetch and decode a single instruction.
• However, that instruction may take it several
cycles to complete.
• A RISC processor would take one cycle per
instruction.
PIPELINES
1. To speed up processors we can use pipelines.
2. To do this we need to break the Fetch –Execute
cycle into stages, e.g.
3.
4.
5.
6.
7.
8.
fetch instructions from memory
read registers and decode the instruction
execute the instruction or calculate an address
access an operand in data memory
write the result into a register
Instead of taking (4 x 5 = 20) cycles the CPU can
process 4 lines of code in just 8 cycles.
WHY PIPELINES DON’T WORK AS
WELL WITH CISC PROCESSORS.
1.
2.
3.
Each line of RISC code takes 1 cycle to execute.
4.
The ‘larger’ commands, particularly branched
commands can cause the pipelines to ‘stall’ which slows
the computer down.
CISC code can take 1, 2 or more cycles to execute.
Therefore the compiler has a harder job of queuing up
the jobs in the pipelines of CISC processors.
KEY QUESTIONS
1. What is the comparison between the laundry and
the RISC processing
2.
3.
4.
5.
6.
What are the RISC instructions
Does the Laundry task represent CISC?
Where is the pipelining comparison?
What impact does it have on the washing?
How could the Laundry Task be written for a CISC?
DISCUSS THE RELATIVE
MERITS OF CISC AND
RISC ARCHITECTURES
WHEN A CHIP
MANUFACTURER IS
PLANNING
A NEW PROCESSOR