RingBPMUpgrade
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Transcript RingBPMUpgrade
Upgrade Proposal for the
ATF Damping Ring BPM
Downconverter Front-end
– Fermilab Activities –
Manfred Wendt
for the Fermilab ATF DR BPM
collaboration efforts
Reminder: BPM Hardware Overview
4 button
BPM
pickup
Upgrade Proposal
CAL
Down Mix
4
LPF
BPF
PLL
4
CTRL
LO (729)
IF (15)
beam
CLK
(64.9)
Dig. Receiv.
VME
Echotek
Timing
Digital I/O
I
TRG
Q
VME µP
Motorola
5500
beam
Position
(EPICS)
714 INJ
Cal (~ 714)
August 28, 2007; ATF DR BPMs
2.16
VME BUS
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2
Motivation
• Dynamic range extension
– Single bunch intensities ~ 1010 e– Multibunch “trains” (batches) up to 3x 20 bunches
(2.8 ns), each ~ 0.7 1010 e– Requires: selectable gain/attenuation (remotely!)
• Commissioning, service, maintenance
– Monitor supply voltages, LO-levels, temperatures, etc.
– Requires: remote read-out for each downconverter.
• Calibration signals
– Long term offset control, due to temperature drifts, etc.
– Automatic online calibration during BPM beam operation.
– Requires: remote controlled calibration signals.
August 28, 2007; ATF DR BPMs
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Goals for Nov/Dec 2007 Run
• Commissioning/testing of an upgraded downconverter
prototype module
– 2 PCB’s each with 2 downmix channels (SLAC)
– 1 PCB with controller circuit and calibration signal generation
(Fermilab)
• Installation of the new downconverter prototype in Nov/Dec
2007
• Testing of remote control and calibration functions using a
“minimum” LabVIEW based test software (no EPICS
integration at that time).
• Focus on the downconverter, controller and calibration
hardware to freeze the prototype design.
• Beam tests may include other BPM improvements
(software, etc.) and beam studies (TbT coupling correction)
August 28, 2007; ATF DR BPMs
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Beam Position Signal Processing
Magnitude-based processing of 4 separate BPM signals
Down Mix A
BPF
B
up
LPF
A
Down Mix B
BPF
H
( A D) ( B C )
A B C D
V
( A B) (C D)
A B C D
LPF
out
in
“Echotek” digital
signal processing:
Down Mix C
C
down
D
BPF
LPF
Pos [mm] 9.35 1.00 3 7.79 5
Down Mix D
BPF
August 28, 2007; ATF DR BPMs
1D polynomial fit:
LPF
Global Design Effort
0.1 dB gain error ≡
27 µm offset error !
5
Calibration Scheme
Down Mix B
BPF
LPF
• 2 calibration tones:
– 714 + ε MHz
– 714 – ε MHz
– In passband of the
downconverter
– Coupling through the
button BPM
Down Mix A
BPF
LPF
Down Mix D
BPF
LPF
• On-line calibration
Down Mix C
BPF
~
~
PLL
PLL
714 –
LPF
– In presents of beam
signals
– Available only in
narrowband mode
– Using separate
Graychip channels
714 +
August 28, 2007; ATF DR BPMs
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CAN Fieldbus Wiring
• CAN fieldbus control:
Motorola 5500 in VME Crate
CAN
DB-9
CAN
– PMC-CAN controller
– Daisy chain up to 32 nodes
– Differential signals, up to
125kBit/sec (@500 m length)
PMC-ECAN-2
Twisted Pair
124Ω Term resistor
jumpered in on last
board
Last BPM
1st BPM
Twisted Pair
CAN In
DB-9
DB-9
CAN Out
CAN In
CAN Transceiver
PCA82C250
DB-9
CAN Out
CAN Transceiver
PCA82C250
CAN
CAN
MC9S12XEP100 uController
August 28, 2007; ATF DR BPMs
DB-9
MC9S12XEP100 uController
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VME crate/CAN
Motorola 5500
w/PMC
User Interface
Service Building
Tunnel
Block Diagram
CAN
~100’ Shielded Cat-5
~30’ Shielded Cat-5 to next BPM
2
3 VDC
Regulator
LP38692MP-5
8VDC in
Splitters Buffers
Freq 1
ADF4153
PLL
ADP-2-9
VCO
Freq 2
ADF4153
PLL
5 VDC
Regulator
LP38692MP-5
ADP-2-9
VCO
CAN0
SPI0
on/off
load
5VDC In
Filter
3
1MB Flash (PLL
freq settings)
2
2
÷8
729MHz
ADF4007
LO
3
SPI1
on/off
load
12-Bit A/D
LO Level
Readout
CLV0700E-LF
To Couplers Near Pick-ups
Regulator
LP2989IM-3.0
XFORM
714MHz
TM01-02+ Pads +/-
Temp
Monitor
2
August 28, 2007; ATF DR BPMs
Cal
ON/OFF
PS Voltage
Monitor
2
1
LNA
on/off
Gain
Control
Freescale MC9S12XEP100 uController
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to SLAC
4
1st BPM Cal Box
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Schematics: CAN Bus
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Schematics: CAL Board (µC & PLL)
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Schematics: Wiring Diagram
August 28, 2007; ATF DR BPMs
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Hardware Key Components
• PMC-ECAN-2 Bus controller
– Commercial PMC CAN bus controller
– VxWorks PPC driver support
• Freescale MC9S12XEP100 16-bit µContoller
– Serial interface support (CAN, I2C, RS485, etc.)
– 8/10/12-bit ADC’s (2x16 ch.), timers, I/O, etc.
– Up to 1M flash, 64k RAM, 4k EEPROM
• Analog Devices AD4153 fractional PLL
– Successfully tested the calibration generation during
the last run (729 MHz locking, 714 ± ε MHz CAL signals).
– Selectable frequency, on/off switch, acceptable phase
noise and spurious harmonics.
August 28, 2007; ATF DR BPMs
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Software Components
CAN
CAN
• Code Warrior IDE for
firmware development
• No Operating system
• USB/CAN programmable
Fermi Cal Box
FermiMC9S12XEP100
Cal Box
SLAC Box
microcontroller
FermiMC9S12XEP100
Cal Box
control program
microcontroller
MC9S12XEP100
control program
microcontroller
control program
CAN
PMC-ECAN-2
VxWorks CAN
Driver (vendor)
Fermi Cal Box
command library
VME
Echotek
BPM control and
acquisition
program
VxWorks
MVME5500
August 28, 2007; ATF DR BPMs
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Current Development Steps…
• Hardware:
– Finalization of the CAL board schematics
– Ordering parts for a first prototype.
– PCB layout.
• Software & system integration
– Waiting for CAN bus evaluation boards and software.
– Integration of CAN bus controller software
– µC firmware development to control PLL’s, logic level
signals and read-out ADC’s.
– Great help from JLab (Al Grippo):
Code Warrior µC firmware
August 28, 2007; ATF DR BPMs
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Open Questions
• Hardware interface SLAC/Fermilab
– Enclosure type and PCB dimensions?
– Between PCB cabling and connectors?
• Prototype “pre”-testing procedure
– Integrated system test at Fermilab?
– How?
– Schedule?
• ATF beam tests
–
–
–
–
–
Schedule?
Mechanical mounting of the new enclosures in the ring?
Power supplies and distribution?
CAN bus cabling?
Beam time?
• Design review and preparing for quantity production!
August 28, 2007; ATF DR BPMs
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