Transcript Programmable Logic Array

Programmable Logic Devices - I
Outline
 Programmable Logic Devices
 PN Diode Operation
 AND Logic Arrays
 OR Logic Arrays
 Two-level AND-OR Arrays
 Programmable Logic Array (PLA)
 Realising Logic Functions with PLAs
Outline
 Programmable Logic Devices
 PN Diode Operation
 AND Logic Arrays
 OR Logic Arrays
 Two-level AND-OR Arrays
 Programmable Logic Array (PLA)
 Realising Logic Functions with PLAs
Programmable Logic Devices (1/4)
 Programmable Logic Devices (PLDs) are IC chips with internal
logic gates connected by electronic fuses.
 These fuses can be ‘blown’ (by programming) to obtain different
circuit configurations.
 Semi-customized chips that give high packing density at
reasonable cost.
 Three classes of PLDs are :

Programmable Logic Array (PLA)
 Programmable Read Only Memory (PROM)
 Programmable Array Logic (PAL)
Programmable Logic Devices (2/4)
Fixed
AND array
Inputs
Fuses
Fused
programmable
OR array
Outputs
Programmable Read Only Memory (PROM)
Fuses
Inputs
Fused
programmable
AND array
Fixed
OR array
Outputs
Programmable Array Logic (PAL)
Fuses
Inputs
Fused
programmable
AND array
Fuses
Fused
programmable
OR array
Programmable Logic Array (PLA)
Outputs
Programmable Logic Devices (3/4)
 “Programming” an array – blowing the fuses.
A A' B B'
A A' B B'
(a) Unprogrammed
x1
x1 = A.B
x2
x2 = A'.B
x3
x3 = A.B'
(b) Programmed
Example of a basic AND array
Programmable Logic Devices (4/4)
 PLDs use diodes. A PN diode is an electronic device formed by
creating a junction of two types of semi-conductor materials, p
type and n type.
 Forward-biased: When p side (anode) is more positive than
n side (cathode), it behaves as a closed switch.
 Reverse-biased: When cathode is more positive than anode,
it behaves as an open circuit.
P
Anode
N
+
Cathode
PN junction diode and
schematic symbol.
-
Forward-biased (closed circuit)
-
+
Reverse-biased (open circuit)
Outline
 Programmable Logic Devices
 PN Diode Operation
 AND Logic Arrays
 OR Logic Arrays
 Two-level AND-OR Arrays
 Programmable Logic Array (PLA)
 Realising Logic Functions with PLAs
PN Diode Operation
+V
(a)
A
(b)
A=0
A
B
B
+V
A=1
(c)
(d)
(e)
A=0
B=0
(f)
A=1
B=1
B=1
+V
B=0
PN diode operation for digital applications.
(a) With pull-up resistor.
(b) Reverse-biased: diode open; B pulled
up to 1.
(c) Forward-biased: diode shorted, forcing
B to 0.
(d) With pull-down resistor.
(e) Reverse-biased: diode open; B
pulled down to 0.
(f) Forward-biased: diode shorted,
forcing B to 1.
Outline
 Programmable Logic Devices
 PN Diode Operation
 AND Logic Arrays
 OR Logic Arrays
 Two-level AND-OR Arrays
 Programmable Logic Array (PLA)
 Realising Logic Functions with PLAs
AND Logic Arrays
+V
(a)
(b)
f(A,B,C) = 0
f(A,B,C)
= A.B.C
A
B
C
+V
(c)
A=0
B=1
C=1
+V
(d)
+V
f(A,B,C) = 1
A=1
B=1
C=1
f(A,B,C) = 0
A=0
B=0
C=1
AND function realised with a diode array.
(a) Basic configuration.
(b) All diodes open; f pulled up to 1.
(c) One diode shorted, forcing f to 0.
(d) Multiple diodes shorted, forcing f to 0.
Outline
 Programmable Logic Devices
 PN Diode Operation
 AND Logic Arrays
 OR Logic Arrays
 Two-level AND-OR Arrays
 Programmable Logic Array (PLA)
 Realising Logic Functions with PLAs
OR Logic Arrays
(a)
(b)
A=0
B=0
C=0
A
B
C
f(A,B,C) = A+B+C
(c)
f(A,B,C) = 0
A=1
B=0
C=0
OR function realised with a diode array.
(a) Basic configuration.
(b) All diodes open; f pulled up to 0.
(c) One diode shorted, forcing f to 1.
f(A,B,C) = 1
Outline
 Programmable Logic Devices
 PN Diode Operation
 AND Logic Arrays
 OR Logic Arrays
 Two-level AND-OR Arrays
 Programmable Logic Array (PLA)
 Realising Logic Functions with PLAs
Two-level AND-OR Arrays
 AND and OR circuits can be interconnected to realise any
arbitrary switching function.
Example: f(a,b,c)=a.b.c'+b'.c
Outline
 Programmable Logic Devices
 PN Diode Operation
 AND Logic Arrays
 OR Logic Arrays
 Two-level AND-OR Arrays
 Programmable Logic Array (PLA)
 Realising Logic Functions with PLAs
Programmable Logic Array (PLA)
 Combination of a programmable AND array followed by a
programmable OR array.
 Example:
Design a PLA to realise the following three logic functions and
show the internal connections.
f1(A,B,C,D,E) = A'.B'.D' + B'.C.D' + A'.B.C.D.E'
f2(A,B,C,D,E) = A'.B.E + B'.C.D'.E
f3(A,B,C,D,E) = A'.B'.D' + B'.C'.D'.E + A'.B.C.D
Outline
 Programmable Logic Devices
 PN Diode Operation
 AND Logic Arrays
 OR Logic Arrays
 Two-level AND-OR Arrays
 Programmable Logic Array (PLA)
 Realising Logic Functions with PLAs
Realising Logic Functions with PLAs
f1(A,B,C,D,E) = A'.B'.D' + B'.C.D' + A'.B.C.D.E'
f2(A,B,C,D,E) = A'.B.E + B'.C.D'.E
f3(A,B,C,D,E) = A'.B'.D' + B'.C'.D'.E + A'.B.C.D
X
X
X
B
X
C
X
X
X
X
X
X
X
X
X
X
X
X
X
D
X
X
X
X
E
X
X
X
X
Programmable
AND array
A
Programmable
OR array
X
A'.B'.D' B'.C.D' A'.B.C.D.E'
X
X
X
X
X
X
P1
A'B'D'
P2
P3
P4
P5
X
X
P6
P7
A'BCDE'
B'CD'E
A'BCD
B'CD'
A'BE
B'C'D'E
f1
f2
f3