Transcript Contd.
ECE 2110: Introduction to Digital
Systems
Introduction (Contd.)
Previous class Summary
Digital devices
Digital vs. analog
Why digital
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Digital Logic
Binary system -- 0 & 1, LOW & HIGH,
negated and asserted.
Basic building blocks -- AND, OR, NOT
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Electronic aspect of digital design
Digital abstraction
Range
Noise margin
Invalid range
Specifications
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Software aspect of digital design
Digital design need not involve any software
tools.
But: modern design, software tools are essential.
Examples:
Schematic entry, HDLs (platform compilers, simulators,
synthesis tools), simulators, test benches, timing
analyzers and verifiers, word processors, high-level
languages, CAD
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Integrated Circuits (IC)
A collection of one or more gates fabricated on a
single silicon chip.
Wafer, die
Small-scale integration (SSI): 1-20
DIP: dual in-line-pin package
Pin diagram, pinout
MSI: 20-200 gates
LSI: 200-200,000
VLSI: >100,000, 50million (1999)
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DIP
pinout
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Programmable Logic Device (PLD)
ICs which Logic function can be programmed
after manufacturing.
2-level AND-OR gates using user-programmable
connections
PLAs: programmable Logic Arrarys.
PALs: programmable array logic devices
Programmable logic devices (PLDs)
CPLD: complex PLD
FPGA: Field-Programmable Gate Array
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CPLD vs FPGA
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Application-Specific ICs (ASIC)
Semi-custom IC: chips designed for a particular,
limited product/application
Reducing chip count, size, power consumption
Higher performance.
NRE: nonrecurring engineering cost
Standard cells: library
Gate array: an IC with internal structure as an array of
gates, unspecified interconnection
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Printed-Circuit Board
PCB or PWB (printed-wiring board)
Mount ICs so that an IC can connect to
other ICs in a system.
SMT: Surface-mount technology
MCM: multi-chip modules: high speed and
density.
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Summary
Electronics aspects of digital design
Integrated Circuits
(wafer, die, SSI, MSI, LSI, VLSI)
PLDs: PLAs, PALs, CPLD, FPGA
ASIC
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Next…
Number systems
Reading: Wakerly chapter 2
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