Transcript 2221-ApendixA

Appendix A Example of a Testability
Design Checklist
•Route test/control points edge
connector to enable monitoring and
driving of internal board functions and
to assist in fault diagnosis.
•Divide complex logic functions into
smaller, combinational logic sections.
•Avoid one-shots; if used, route their
signals to the edge connector.
•Avoid potentiometers and "select-ontest" components.
Appendix A Example of a Testability
Design Checklist
•Use a single, large-edge connector to
provide input/output pins and test/control
points.
•Make printed board input/output signal
logic-compatible to keep test equipment
interface costs low and give flexibility.
•Provide adequate decoupling at the
board edge and locally at each
integrated circuit.
•Provide signals leaving the board with
maximum fan-out drive, or buffer them.
Appendix A Example of a Testability
Design Checklist
•Buffer edge-sensitive components
from the edge connector - such as
clock lines and flip-flop outputs.
•Do not tie signal outputs together.
•Never exceed the logic rated fanout; in fact, keep it to a minimum.
•Do not use high fan-out logic
devices. do use multiple fan-out
devices, and keep their outputs
separate.
Appendix A Example of a Testability
Design Checklist
•Keep logic depth on any board to a
low level by using edge terminated
test/control points.
•Single-load each signal entering the
board whenever possible.
•Terminate unused logic pins with a
resistive pull-up to minimize noise
pick-up.
•Do not terminate logic outputs directly
into transistor bases. do use a series
current-limiting resistor.
Appendix A Example of a Testability
Design Checklist
•Buffer flip-flop output signals before
they leave the board.
•Use open-collector devices with pullup resistors to enable external
override control.
•Avoid using redundant logic to
minimize undetectable faults.
•Bring outputs of cascaded counters to
higher- order counters so that they
can be tested without large counts.
Appendix A Example of a Testability
Design Checklist
•Construct trees to check the parity
of selected groups of eight bits or
fewer.
•Avoid "wired'OR" and "wired'AND"
connections.
•If you cannot, use gates from the
same integrated circuit package.
•Provide some way to bypass levelchanging diodes in series with logic
out-puts.
Appendix A Example of a Testability
Design Checklist
•Break paths when a logic element
fans out to several places that
converge later.
•Use elements in the same
integrated circuit package when
designing a series of inverters or
inverters following a gate function.
•Standardize power-on and ground
pins to avoid test-harness
multiplicity.
Appendix A Example of a Testability
Design Checklist
•Bring out test points as near to
digital-to-analog conversion as
possible.
•Provide a means of disabling onboard clocks so that the tester
clock may be substituted.
•Provide mounted switches and
resistor-capacitor networks with
override lines to the edge-board
connector.
Appendix A Example of a Testability
Design Checklist
•Route logic drivers of lamps and
displays to the edge connector so
that the tester can check for correct
operation.
•Divide large printed boards into
subsections whenever possible,
preferably by function.
•Separate analog circuits from
digital logic, except for timing
circuits.
Appendix A Example of a Testability
Design Checklist
•Uniformly mount integrated circuits and
clearly identify them to make it easier to
locate them.
•Provide sufficient clearance around
integrated circuit sockets and directsoldered integrated circuits so that clips
can be attached whenever necessary.
•Add top-hat connector pins or mount
extra integrated circuit sockets when
there are not enough edge-board
connector pins for test/control points.
Appendix A Example of a Testability
Design Checklist
•Use sockets with complex
integrated circuits and long,
dynamic shift registers.
•Wire feedback lines and other
complex circuit lines to an
•Use jumpers that can be cut during
debugging. The jumpers can be
located near the edge-board
connector.
Appendix A Example of a Testability
Design Checklist
•Fix locations of power and ground
lines for uniformity among several
board types.
•Make the ground conductor large
enough to avoid noise problems.
•Group together signal lines of
particular families.
•Clearly label all parts, pins and
connectors.