Transcript Black Box Electronics - University of Toronto

Black Box Electronics
An Introduction to Applied Electronics for Physicists
4. Sample Circuits
University of Toronto
Quantum Optics Group
Alan Stummer, Research Lab Technologist
Sample Circuits
• General
– Coil switch
– LED switch
• Analog
– Photodiode monitor (transimpedance amp)
– Linear laser driver
• Hybrid
– Planar triode grid pulse, for Pockels cell.
Coil Switch
• D1 is “flyback” diode, to absorb energy from coil when Q1 turns off. Without it,
Q1 would be destroyed the first time it turns off.
• R1 forces Q1 into cutoff if nothing connected to BNC.
• Q1 is “logic level” – VGS(thresh) is ≤ +2V, the minimum TTL high voltage.
LED Switch
•Separate resistors R3-4
because voltage drop across
each LED chain is not identical.
Single resistor would result in
deterministic total current but
indeterminate current distribution.
• R3 and R4 voltages are 10V –
5*1.5V, therefore ILED = 50mA.
• Can ignore Q2’s RDS(on) of
0.025Ω(max) at VGS = +5V,
insignificant compared to R3-4.
Photodiode Monitor
”Transimpedance Amplifier, TIA”
• PD1 generates current at typically
0.5-1A/W.
• Current generated by PD1 is
mirrored through R5 by IC1.
• Full scale is 5V (5mA, ~5mW).
• Bandwidth (rise & fall times) set by
C1 and R5, here 68KHz.
• C1 is mandatory to prevent positive
feedback (oscillation) from PD1’s
capacitance.
• Slightly slow response by PD1 as
is. Add reverse bias of several volts
to reduce junction capacitance for
faster response.
Linear Laser Driver
• Stable reference voltage of +1.25V set by IC3, proportion taken by pot R6.
• IC5 turns on Q3 enough so that the laser current through R9 creates the same voltage
across R9 as from R6.
• IC5 integrates error current from R7 through C5; forces IC5 to be IR7 until both are zero.
•R10 is protection against excess laser current, C6 provides noise and EMI filtering.
How [not] To Develop a Circuit
FPGA Development Overview
Experiment
PCB
(Hardware)
Config
Chip
Active
Serial
Port
DACs
GUI
Software
FPGA
Firmwar
e
ADCs
FPGA
IDE
Quartus
Computer
100MHz
Clock
USB
Port
USB
Blaster
FPGA Pockels Cell Controller
Development Sequence
1.
Write and simulate firmware, select FPGA (Quartus).
2.
Design circuit – A.K.A. schematic capture (Eagle).
3.
Layout PCB – A.K.A. CAD (Eagle).
4.
Order components, then PCB.
5.
Assemble and test supplies, assemble remainder.
6.
Load config chip.
7.
Write software/GUI (LabView/Windows, VisualC/Basic).
8.
Test hardware, firmware and software.
9.
Modify hardware, firmware and/or software, reload config chip.
10.
Repeat 8-9 ad nauseam or until can go no further.
11.
Spin (revise and reorder) PCB, repeat from 4.
FPGA Based Pockels Cell Driver
• FPGA is used for speed and complexity – 5nS resolution over 100mS cycle.
• FPGA IC9 uses “config chip” IC5 for program and clock IC6.
• Config chip is programmed via “Active Serial” connector J3.
• FPGA has multiple I/Os to DACs and LEDs.
• FPGA has 16-bit bi-directional bus with USB interface IC12, for control and monitoring.
• Power supplies not shown: +3.3V and +1.5V.
Suggested Components
Discrete Semis
Diode, small signal, SOD-523
---
1N4148WT
Diode, medium signal, SMB
---
1N4004WDICT
Schottky, 1A 30V, SMB
ON Semiconduct.
MBRS130LT3
N-FET, small signal, SOT-23
---
2N7002CT
NPN, small signal, SOT-23
On Semiconduct.
MMBT5551LT1OSCT
PNP, small signal, SOT-23
On Semiconduct.
MMBT3906FSCT
PNP, large signal, D-Pak
On Semiconduct.
MJD253T4
Opamp, gp RRIO, SOT-23-5
Analog Devices
AD8605ART
Opamp, very fast, SOT-23-5
Analog Devices
AD8009JRT
Opamp, dual,gp RRIO, SOIC-8
Linear Technology
LT1630CS8
LDO, fixed and adj
On Semiconduct.
LM1086CT-ADJ, -5, -3.3, ...
Bandgap reference, 1.25V 1A, SOT223
National Semi.
LM317EMP
DC-DC buck/boost/invert, 500mA
Analog Devices
ADP3000AR
ICs
Ω The End Ω
Next: 5. Need suggestions for subject(s) to focus on:
Spice (circuit simulation)?
Op Amps?
Transistors?
FPGAs?
More sample circuits?
Power supplies?
Micros?
Thanks for coming!