Transcript Document

Hips and pinhole effects on APV25
1) HIPS (Highly Ionising Particle effects) (G.Hall, R.Bainbridge, M.Raymond)
Large deposition of charge in several channels following nuclear interaction in sensor
Observed in recent X5 25ns beam test (120 GeV p’s) causing saturated APV baseline
Importance depends on APV recovery time, not previously studied for signals
as large as those involved here (up to 1000 MIPs), and hip event rate.
outline
Simulated hip signal sizes and rates, X5 vs CMS
APV deadtime measurements with simulated hip signals
Results from beam test data, comparisons with simulation
Summary of current status
2) Sensor AC coupling capacitor pinhole effects on APV
concern that one or more pinholes/APV developing over CMS lifetime may disable chip
because of common resistor supplying power to preamp output inverter
outline
Explanation of problem
APV measurements: present situation and possible improvements
Summary
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X5 beam test hip event (1)
Hip event in this layer:
saturated signal spread over number of channels
-ve baseline saturation for remaining channels
baseline saturation attributed to on-chip
CM subtraction
v. large +ve signal in few channels -> -ve
saturated baseline in the rest
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2
X5 beam test hip event (2)
saturated baseline in this layer
~ no signal evident
=>chip insensitive to signals (deadtime)
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Hips rates and magnitudes (M.Huhtinen simulations)
Differential Energy spectrum: Probability/incident pion of depositing energy E in 300mm Si layer
10-4
CMS: lower rates at higher energies (>25 MeV)
X5: higher prob of v. high energies (up to 150 MeV)
Can use these curves to calculate chip deadtime
consequences if it depends on E
X5
10-5
Integral spectrum: total prob. of pion depositing energy > E
CMS
10-3
10-6
10-4
1 MIP (300m Si) = .090 MeV
10-7 100 MeV = 1111 MIP
10-5
0.1 MeV 1 MeV 10 MeV 100 MeV
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E
10-6
Use these data to confirm
hip rates in beam are due
to nuclear interactions
10-7
0.1 MeV 1 MeV 10 MeV 100 MeV
CMS Week, December 2001
E
4
Effect of HIPs on APV25
preamp
V250
Rinv
V250
external resistor (on hybrid)
1 per APV chip
vCM
V125
vIN+vCM
this node common to all
128 inverters in chip
vOUT = -vIN
VSS
Possibly aggravated by on chip CM subtraction*
CM subtraction due to external resistor supplying power to preamp output inverter stage
(introduced for stability reasons after 1st prototype hybrid tests)
Could be good thing, gives robustness to external CM sources (e.g. sensor bias line noise, sensor
backplane pickup)
But CM subtraction for v.large hip signals, spread over number of channels -> big –ve baseline shift
for remaining channels.
*see http://cmsdoc.cern.ch/~ghall/TKEL_1001/Raymond_1001.pdf
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1 APV I/P sees
normal amplitude
signal
Csig
Hip test setup and method
using individual APV test setup can access up to 8 input channels
*
share hip signal equally between 7 channels, injecting normal
amplitude signal (3 mips) into 1 channel to see how affected by hip
vary injection time of hip signal covering range from ~5 msec
before to just after normal signal time
*
*
*
*
*
*
7 APV I/Ps
see hip charge
shared equally
*Chip
all measurements performed in deconvolution mode
injection time
for normal signal
trigger (T1)
time for
normal signal
latency
range of variation of injection time of hip signal
5 msec
0
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t
6
Time development of APV response following hip event (1)
Before hip occurs:
normal amplitude (3 MIP) signal in one channel
At time of hip signal:
saturated +ve signals in
channels sharing hip charge
CM subtraction -> -ve saturation
for all other channels
~50 ns after hip signal:
-ve saturation for all channels
v. large signals on > few channels disables others (for a time) because of
common resistor supplying power (some analogy to pinhole effects – see later)
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Time development of APV response following hip event (2)
Some time later (depending on size of hip signal):
baseline begins to swing +ve, but no signal recovery yet
Later still:
baseline saturates +ve
again
Finally:
baseline and signal begin to recover, chip now sensitive to signals again
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Time development of APV response following
hip event – continuous time picture
300 mip signal, deconvolution mode,
300
Acquire APV output frames and plot dependence of channels
on time of hip signal injection (identical method to that used
to map amplifier pulse shape)
200
red curve: one of 7 channels sharing hip charge
+ve saturation at time of hip signal (duration ~50 ns)
–ve saturation for time dependent on hip magnitude
+ve overshoot, then recovery
0
300
100
ADC units
green curve: channel containing 3 mip signal
one of 7 chans sharing
300 mip signal
channel with signal
200
100
any channel without signal (baseline)
blue curve: any other channel (excluding hip and signal channels)
i.e. output frame baseline
black curve = green – blue: represents chip dead time
0
120
channel with signal - baseline
80
40
Use black curve look at dead time dependence on hip signal magnitude
0
0
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1000 2000 3000 4000 5000
time of hip signal injection [nsec.]
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APV dead time dependence on hip signal size
deconvolution, Rinv=100W to V250
negligible disturbance up to 100 MIPs (300mm Si)
dead time effect appears between 100 and 200,
increasing with hip signal size (up to ~ 1.4 msec.)
ADC units (curves offset for clarity)
100 mips
200 mips
300 mips
500 mips
1000 mips
0
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1000
2000
3000
time [nsec.]
4000
5000
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Deadtime parameterisation
Rinv = 100W to V250
simple parameterisation –> deadtime dependence on E
can use (together with simulated energy spectrum) to predict hit loss rate
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Hit loss prediction
Prob. of missing hit (E) = Prob.(E)*[deadtime(E)/25ns]*128*occupancy
128 factor here because all
channels affected not just
those seeing hip signal
tail of spectrum
Prob.(E) falling
deadtime(E)
increasing
Sum bins to give total probability of hits lost (Rinv=50W to V250)
CMS: 0.7% per track per 300mm layer per 1% occupancy
X5:
1.5%
(note: beam test evidence => these numbers too big – see later)
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APV dead time dependence on Rinv
deconvolution, Rinv=0W to V125
deconvolution, Rinv=50W to V250
100 mips
ADC units (curves offset for clarity)
ADC units (curves offset for clarity)
100 mips
200 mips
300 mips
500 mips
200 mips
300 mips
500 mips
1000 mips
1000 mips
0
1000
2000
3000
time [nsec.]
4000
5000
0
1000
2000
3000
time [nsec.]
4000
5000
non-negligible dead time even if Rinv removed (need better understanding why)
Rinv=50W performance better than 100W
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Hit loss prediction (Rinv=0W to V125)
•Hits lost
CMS 0.3% per track per 300µm layer per 1% occupancy
X5
0.6%
significant improvement on Rinv=100W
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Hit loss prediction (Rinv=50W to V250)
•Hits lost
CMS 0.4% per track per 300µm layer per 1% occupancy
X5
1.1%
worse than Rinv=0, but better than Rinv=100W
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Beam test (X5) data analysis (R.Bainbridge)
initial objective: confirm hip event rate in beam consistent with event rate predicted by simulations
1553
events
Pulse height distribution for normal signals
-> 1 MIP (500mm Si) = 57 ADC units
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Common mode plot showing events
with negative saturated baseline
– use to select hips events
low baseline < 150 (2.6 MIPs)
CMS Week, December 2001
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Beam test (X5) data analysis (R.Bainbridge)
Selecting hip events only
Cluster charge
1051 events this
side of line (with signal)
Cluster size
most probable hip event cluster
size = 6 strips
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identify 1051 events which contain signal
(these are hip events, other 502 are saturated
baseline events with ~no signal)
CMS Week, December 2001
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X5 data hip rate compared with simulations (preliminary)
•247k triggers, 6 x 500µm detector layers , ≈ 1.8 pions per plane
•Landau -> 1 MIP = 57 ADC channels in 500µm silicon ≈ 0.150 MeV
•Low baseline criterion: CM level < -150 ADC channel (-2.6 MIPs)
If baseline drops by 2.6 MIPs,
energy deposited ≥ 2.6 x (~120) x 0.150MeV ≈ 47MeV
150 ADC units
No of low baseline events found using these criteria
= 1051 events depositing E ≥ 47MeV
= 1.4 x 10-4 per 500µm layer per incident pion
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X5 data (preliminary)
•
But simulation rate predictions are for 300µm silicon
No. of events will scale with thickness
1.4 x 10-4 per 500µm layer per incident pion
-> 0.9 x 10-4 per 300µm layer per incident pion (depositing E ≥ 47MeV)
•
Simulated energy deposited may also reduce (await new simulations for 500mm)
same hip event in 500mm may deposit less in 300mm
=> perhaps should look at rates for lower energy threshold
•
Simulation prediction for 300µm Si (Integral plot - M. H)
E > 47 MeV in X5
≈ 1.4 x 10-4 per 300µm layer per incident pion
E > 32 MeV in X5
≈ 1.8 x 10-4 per 300µm layer per incident pion
•
Conclusion:
~ some agreement between beam test rate and simulation
=> consistent with nuclear event hypothesis? (need error assessment)
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Hips summary
• Preliminary test beam data analysis gives hip rate ~ consistent with nuclear interaction rate simulation
• Magnitude and rate of hips events, if simulated by equal charge on 7 APV channels,
leads to significant deadtime for all channels, with a dependence on hip energy. Using this
measurement and simulated hip energy spectrum can predict hit loss rate in CMS and X5
CMS
0.7%
0.4%
0.3%
X5
1.5%
0.8%
0.6%
per track per 300mm per 1% occupancy
Rinv=100W to V250
Rinv=50W to V250
Rinv=0W to V125
• But inconsistency exists between hip effect in beam and what we expect from APV measurements
APV measurements => hits lost due to deadtime = 0.9% (per track per 500mm per 0.35% occupancy)
X5 Beam data: 1050 out of 1553 low baseline events have hip signal
Only 503 events have saturated baseline with ~ no signal
=> hits (on tracks) actually lost due to deadtime = 503/247k = 0.2%
• Whats going on?
Could beam triggers be biased towards beginning of bunch?
Perhaps simple equal charge sharing in APV measurements not good model?
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CMS Week, December 2001
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What if charge not shared equally between channels?
8001000 mip signal shared between 7 channels
800
700
700
1000 mip signal on 1 channel only
600
500
500
channel with signal
400
300
ADC units
ADC units
channel with hip
600
400
300
baseline
200
200
deadtime
100
signal - baseline
0
0
1000
no deadtime
100
2000
3000
time [nsec.]
4000
0
5000
0
1000
2000
3000
time [nsec.]
4000
5000
Extreme case! - but illustrates importance of charge distribution
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Hips summary (cont’d)
•
•
•
If hip signal more localised, majority of charge may cause saturation in 1 or 2 strips only
Other strips may see signal large enough to show full range (~ 8 MIPs)signal in
output frame, but no saturation in preamp
In this case deadtime will be reduced
Hips conclusions
• Too early to conclude – much to be done
• Hit loss rates based on simple APV measurements significant but beam data
indicates could be pessimistic
• If hip charge confined to 1 or 2 channels then deadtime should be less
Next steps
•
•
•
Could use more physics info on hip charge distribution (simulation?)
Look at APV behaviour with different hip charge distribution
Continue test beam data analysis. Special trigger runs may be useful.
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APV O/P
stage range
22
Sensor AC coupling capacitor pinhole effects (1)
V250
SENSOR
Ileak
APV
Vc
Rpinhole
V125
Vi
Cc
det.
bias
Rinv (100W)
V250
Rpoly (~1.8 MW)
this point
common for
all 128 chans
+.75V
DCU
VSS
Rsens (100W)
VSS
Potential Problem (identified by R. Hammarstrom)
When Ileak small: Vc < +0.75V:
current flows out of APV, APV O/P (Vi) saturates +ve
result: one dead channel, no other significant effect
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When Ileak big: Vc > +0.75V:
current flows into APV, APV O/P (Vi) saturates -ve
result: dead channel but also
inverter output transistor turns on, draws maximum
current it can, stealing current from remaining inverters
on chip.
possible mechanism for one pinhole to disable complete
chip
CMS Week, December 2001
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Pinhole effects - quantification
APV
SENSOR
Ileak
Vc
Rpinhole
V125
Cc
det.
bias
this point
common
for all strips
Rpoly (~1.8 MW)
DCU
+.75V
Rsens (100W)
VSS
Assume (after irradiation) 5mA total current (Ileak + Iguard) through Rsens -> +0.5V drop
then Vc > +.75V if Ileak > ~140nA
If Ileak = 1mA, Vc = 2.3 V
actual current into APV will depend on Rpinhole
worth noting
If Rpoly had been less (eg 300kW – no sig. noise penalty) and Rsens also (eg 50W)
Vc = 0.55 V and no problem should appear
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Pinhole effects test method
Csig
Look at the output of one channel with signal injected
switch +ve leakage current into increasing numbers (up to 7)
of channels
1 APV I/P sees
signal
+ve
look for degradation of signal
Ileak magnitude (each channel) not critical, 1mA used but
no difference if more, saturation already occurred by this
point
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up to 7 APV I/Ps
see positive
leakage current
25
Pinhole effects – results from APV (1)
deconvolution
ADC units
Peak mode
v
0
1
2
3
4
5
6
7
time
time
Normal operation (inverter IN, Rinv=100W, nominal power supplies)
no noticeable effect for 1 pinhole, slight degradation for 2, but big effect for >2
can anything be done to improve robustness?
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Pinhole effects – results from APV (2)
Peak mode
deconvolution
ADC units
0
1
2
3
4
5
6
7
time
time
Normal operation (inverter IN, Rinv=50W, nominal power supplies)
no noticeable effect for up to 3 pinholes, slight degradation after 4th, big effect for >4
brute force approach, power penalty (extra 13mA) but significant improvement
any other possibilities in case of even worse situation?
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Pinhole effects – results from APV (3)
Peak mode
ADC units
0
1
2
3
4
5
6
7
time
deconvolution
time
Normal operation (inverter IN, Rinv=50W, V125 -> 1.125 (-10%))
no noticeable effect for up to ~6 pinholes
reducing V125 -> reduction in average gate voltages for remaining good channels => current is retrieved
from bad channels
perhaps not very attractive solution, affects many modules which may be working perfectly
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Pinhole effects – results from APV (4)
Peak mode
deconvolution
ADC units
ln0
ln1
ln2
ln3
ln4
ln5
ln6
ln7
time
time
Non-normal operation (inverter OUT, Rinv=50W, nominal power supplies)
tolerance to >7 pinholes/APV
can be switched in for individual chips without affecting others
reduced linear analogue range, need to run with high baseline (power penalty)
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CMS Week, December 2001
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Pinhole effects – summary
normal operation, Rinv=100W, nominal supply voltages
normal operation, Rinv=50W, nominal supply voltages
normal operation, Rinv=50W, V125 ->1.125V (-10%)
inverter switched out, Rinv=100W, nominal supply volts
Maximum no.
of pinholes
tolerable
2
4
6
>7
CONCLUSIONS (on pinholes)
probably too vulnerable at present (Rinv is a weak point here)
some improvement possible without system perturbations
further strategies available to recover if large no. of pinholes develop (but pinholes = dead channels)
need to assess risk
Other possibilities
remove Rinv – revisit hybrid stability issue
reduce Rpoly on sensor (possibly Rsens as well)
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CMS Week, December 2001
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