Transcript memory-mapped I/O

Operating Systems
COMP 4850/CISG 5550
Principles of I/O Hardware
Dr. James Money
I/O Hardware
• Different people look at hardware
differently
– EEs considers the wires, power, motors, and
other physical components
– Programmers look at the commands,
functions, and errors that the hardware
handles
• These are interconnected and we look at
the hardware first
I/O Devices
• There are generally two classes of I/O
devices on a system
– Block Devices
– Character Devices
• Block devices stores information in fixed
blocks.
• These blocks range from 512 bytes to
32768 bytes
I/O Devices
• The boundary between and block and
character device is not well defined as it
may seem
• Disks are block devices
• What about tape drives?
– Are they character or block devices?
I/O Devices
• Tape drives in some ways are both
– They are block devices – you read it in a set
of blocks
– However, there is no random access
component – you can only naturally read the
next block like a character device
I/O Devices
• A character device reads or write a stream
of bytes without any block structure to the
data
• Most non-disk devices are character based
• This includes mice, printers, keyboards,
network interfaces
I/O Hardware
• The classification system in not all
inclusive
• For example, what is a clock?
– No blocks to address
– No stream to input or output
– They only cause interrupts at well-defined
times
• Also, memory mapped screens
I/O Hardware
• There is a range of speeds for I/O
hardware
• As a result, software must perform well at
various different input/output speeds
• As time progresses, the devices tend to
get faster in throughput
I/O Hardware
Device Controllers
• I/O devices are typically divided into two
components
– Electronic component – Device controller or
adapter
– Mechanical component – the device itself
• The device controller is your interface to
the hardware in software
Device Controllers
Device Controllers
• The controller typically has a cable from it
to the device
• This cable can handle multiple devices
typically
• Usually standardized by ANSI, ISO, or
IEEE
• Example: Disks – IDE/ATAPI, SCSI, SATA
Device Controllers
• The interface tends to be a low level
• Disk might have 256 sectors of 52 bytes per
•
•
track
The data might be a bit stream with a preamble,
then 4096 bits of data, and a checksum, known
as the error correcting code(ECC)
The preamble has the cylinder and sector
number when formatted
Device Controllers
• The controller then converts this bit
stream to a block of bytes inside the
controller memory
• When determined to be error free, then it
is copied to main memory
• Similar interface for a character device
• This all simplifies interface to the device
Memory-Mapped I/O
• Each controller has a few registers that it
uses to communicate to the CPU
• Use these ports, the device knows when
to read, write, or turn on/off
• There is usually a memory buffer the OS
can access as well
• Example: Video RAM – for display pixels
Memory-Mapped I/O
• How does the CPU communicate with the
controller
– Special control register called I/O port
– Memory-mapped I/O – map all registers to
memory
Memory-Mapped I/O
• Using I/O ports, there is an 8 or 16 bit integer
that represents that controller register
• You can use
IN REG, PORT
OUT PORT, REF
for input and output
• Note that the address space for memory is
separate from I/O ports
Memory-Mapped I/O
•Three types:
•Separate I/O and memory space
•Memory-mapped I/O
•Hybrid
Memory-Mapped I/O
• In memory-mapped I/O, the controller
registers are mapped to a particular
memory location
• This is typically done at the top of memory
address space
• IBM PC has this with 640K-1M being
memory mapped but also has I/O ports
Memory-Mapped I/O
• Different advantages/disadvantages for
memory-mapped I/O
– No special I/O instructions (Not in C/C++)
– No special protection mechanism needed
– Every instruction that accesses memory can
now access control registers
– Need selective caching
– Must decide whether location is memory or
device
Memory-Mapped I/O
Direct Memory Access (DMA)
• Regardless of I/O ports or memory-
mapped I/O, we need some way to
transfer the data to main memory
• We can read one byte at a time, but this is
slow!
• This also wastes the CPU’s time
Direct Memory Access (DMA)
• A different scheme is needed
• This scheme is called Direct Memory
Access (DMA for short)
• This requires a DMA controller for the
system, which is common
• Typically there is a single DMA controller
• Can also have one for each device
Direct Memory Access (DMA)
• The DMA controller has direct access to
the RAM, bypassing the CPU
• The DMA controller has several registers
– Memory address register
– Byte count register
– Control registers – specifies I/O port to use,
direction of transfer, unit size and number of
bytes
Direct Memory Access (DMA)
1. CPU programs DMA controller to know where
2.
3.
4.
5.
to transfer to
It tells the disk controller to read the data from
disk
DMA initiates transfer from disk controller to
DMA controller, byte by byte
The disk controller sends the data to bus and it
is written directly to RAM(request on bus
address line)
Byte count decrements, and the process
repeats at #2
Direct Memory Access (DMA)
Interrupts
Interrupts
• If there are no interrupts, it is processes
immediatey
• If there is another interrupt in progress,
the interrupt forces it to wait until the first
one is done
Interrupts
• What happens when the interrupt signal
occurs?
– The CPU stops what it is doing
– It takes the address line of the interrupt and
uses it as an index into a table called the
interrupt vector table
– The value at this address is the location of the
interrupt vector routine
Interrupts
• Eventually, the routine writes to the
interrupt controller indicated it has started
work on the interrupt
• Interrupt controller is now free to start
another interrupt
• Where is the CPU state saved? Which
process? Or kernel stack?(stack state vs
mode switch)