Transcript General Semiconductor Packaging Process Flow

General Semiconductor Packaging Process Flow
Wafer Backgrinding, Die Preparation, Die
Attach, Wire Bonding, Die Overcoat, Molding,
Sealing, Marking, DTFS, Lead Finish,
Electrical Testing, Tape & Reel, Dry Packing,
Boxing and Labeling.
DMT 243 – Chapter 3
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General Semiconductor Packaging Process Flow
Wafer Backgrinding
•
Is the process of grinding the backside of the wafer to the correct
wafer thickness prior to assembly. Also referred to as 'wafer
thinning.'
•
Wafer back grinding has not always been necessary, but the drive to
make packages thinner and thinner has made it indispensable. Most
package types in the semiconductor industry today would require a
wafer thickness ranging from 8 mils (~200 µm) to 20 mils (~500
µm). Stacked die technology would require less than 100 µm.
•
Improves the transfer of heat from the front device side of the wafer
to the backside, thus help to improve reliability.
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General Semiconductor Packaging Process Flow
Wafer Backgrinding
•
•
•
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There are several methods that are presently being used for thinning wafers,
the most popular being the well-established mechanical backgrinding and
polishing technique.
This process is preferred in many cases because it is faster and less costly
than the newer chemical or plasma etching processes that have been
recently developed.
However, it does have the disadvantages of applying mechanical stress and
heat during the grinding process and of causing scratches on the backside
of the wafer.
These scratch patterns and the depth of the scratches on the surface of the
wafer are directly proportional to the size of the grit and the pressure exerted
on the wafer during the grinding process.
The depth of the scratches and the backside surface roughness of the
semiconductor die have a direct correlation to the strength of the die, so it is
critical that the finished backside surface of the wafer be as smooth (or
polished) as possible.
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The Backgrinding Process
Surface
lamination
Coarse
Grinding
Fine
Grinding
Wafer
Cleaning
Surface
de-laminate
Three equipment designs
for coarse and fine
grinding
of
multiple
wafers.
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General Semiconductor Packaging Process Flow
The Backgrinding Process
•
Wafers normally undergo a cleaning and surface lamination process prior
to the actual backgrinding process.
Surface lamination involves the
application of a protective tape over the surface of the wafer to protect it
from mechanical damage and contamination during backgrinding.
•
Backside grinding of the wafer using a two-step process – coarse grinding
followed by fine grinding. During coarse grinding, typically 90% of the
back grind is completed, significantly reducing the thickness of the wafer.
Coarse grinding will cause microcracks and damage the silicon lattice. Fine
grinding completes the back grind process and removes part of this
damage, but still leaves some silicon flaws behind.
•
To remove debris from the wafer while backgrinding, the wafer is usually
washed continuously with D/I water while undergoing backgrinding. Lastly,
the protective tape on the surface is removed (delaminate).
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General Semiconductor Packaging Process Flow
Important Parameters
•
Spindle speed - the rotational speed of the grinding wheel
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Spindle coolant water temperature and flow rate
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D/I water temperature
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Initial and final wafer thickness
•
Feed speeds - the feed rate of the grinding wheel toward the
wafer.
DMT 243 – Chapter 3
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Process Parameters
Silicon
wafers
backgrinded with a)
2000 grit and b) 1200
grit grinding wheels
(30X).
• Average roughness
• Die strength
• Wafer breakage
DMT 243 – Chapter 3
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General Semiconductor Packaging Process Flow
Wafer Backgrinding Failures
Scratches
After backgrinding, the wafer will exhibit a scratch pattern on the
backside. The depth of these scratches will depend on the size of grit
of the wheel and the amount of vertical pressure applied during
grinding (A finer grit results in smaller and shallower scratches.)
Die scratches
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General Semiconductor Packaging Process Flow
Wafer Backgrinding Failures
Die scratches (optical)
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Die scratches (optical)
Die scratches (SEM)
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Other Approaches in Wafer Thinning
(Dicing before grinding)
Process Step: (Mechanical Polishing)
DMT 243 – Chapter 3
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The wafer is cut in half (dicing saw)
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The tape is laminate the surface
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The backside of the wafer is grinding
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The wafer is then mounted on the wafer mounting
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The laminated surface is peeled
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General Semiconductor Packaging Process Flow
Other Approaches in Wafer Thinning
Atmospheric Downstream Plasma (ADP)
Carbon tetrafluoride (CF4)
Dry etch process that removes material isotropically (same is all direction) from the Si
wafer surface. The process uses a combination of argon (Ar) and carbon tetrafluoride
(CF4) plasmas. The thinning mechanism occurs when radicals of the reactive gas,
produced in the plasma, causes chemical reactions on the Si wafer surface. This
process can selectively remove silicon from the wafer backside.
It has highest throughput but highest capital investment as well.
DMT 243 – Chapter 3
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General Semiconductor Packaging Process Flow
Other Approaches in Wafer Thinning
Wet chemical etching
A common technique to remove material stress free. To thin a whole wafer, a
spin-spray etching mechanism has been developed.
The process involves spraying an etching agent onto the surface of a rotating
wafer periodically. Different chemical compositions of etching agents can give
a wide variety of surface finishes, from a mirror-like surface finish to a very
rough surface finish. The most common isotropic etching agent used for
thinning Si wafers is a mixture of hydrofluoric acid (HF) and nitric acid
(HNO3).
It has very fast etching rate in silicon, unfortunately 20 um thick silicon has to be
removed in order to reach good thickness variation performance. So the
throughput is not the highest among these three.
DMT 243 – Chapter 3
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General Semiconductor Packaging Process Flow
Other Approaches in Wafer Thinning
Polishing Types BG
Machine Cost
Good
Plasma
Etching
No Good
Running Cost
Good
No Good
Good
Throughput
No
Good
None
Good
Fair
None
Need
Extra Environment
Facility
DMT 243 – Chapter 3
Chemical
Etching
Good
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Other Approaches in Wafer Thinning
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General Semiconductor Packaging Process Flow
Die Preparation
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Die preparation is the process by which the wafer is singulated into
individual dice in preparation for assembly. Die preparation consists
of two major steps, namely, wafer mounting and wafer saw, (other
than wafer saw, people also use diamond scriber/Die cutting/Dicing)
DMT 243 – Chapter 3
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General Semiconductor Packaging Process Flow
Die Preparation
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Wafer mounting is the process of providing support to the wafer to
facilitate the processing of the wafer from Wafer Saw through Die
Attach.
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Wafer mounting is performed right before the wafer is cut into
separate dice.
DMT 243 – Chapter 3
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Die Preparation
During wafer mounting
The wafer and a wafer frame are simultaneously attached on a wafer or
dicing tape. The wafer frame may be made of plastic or metal, but it should
be resistant to warping, bending, corrosion, and heat.
The dicing tape (also referred to as a wafer film) is just a PVC sheet with
synthetic adhesive on one side to hold both the wafer frame and the wafer.
The adhesive tape on which the wafer is mounted ensures that the
individual dice remain firmly in place during dicing (as the process of cutting
the wafer).
The following concerns must be prevented: wafer cracking or breakage,
bubble trapping on the adhesive side of the tape, scratches on the active
side of the wafer, and non-uniform tape tension which can result in tape
wrinkles.
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General Semiconductor Packaging Process Flow
Die Preparation
Wafer film for mounting
Wafer glued on blue
tape and cut into
pieces
Wafer mount station
Wafer mounted on the wafer
frames
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Wafer Saw or Die cutting or dicing is a process of reducing a wafer
containing multiple identical integrated circuits to dice each containing
one of those circuits.
During this process, a wafer with up to thousands of circuits is cut into
individual pieces, each called a die.
In between the functional parts of the circuits, a thin non-functional
spacing is foreseen where a saw can safely cut the wafer without
damaging the circuit.
This spacing is called the scribe or saw street. The width of the scribe is
very small, typically around 100 μm. A very thin and accurate saw is
therefore needed to cut the wafer into pieces. Usually the dicing is
performed with a water-cooled circular saw with diamond-tipped teeth.
DMT 243 – Chapter 3
M.Nuzaihan
General Semiconductor Packaging Process Flow
DMT 243 – Chapter 3
M.Nuzaihan
General Semiconductor Packaging Process Flow
Wafer saw follows wafer mounting is the step that actually cuts the
wafer into individual dice for assembly in IC packages
The wafer saw process consists of the following steps:
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The frame-mounted wafer is automatically aligned into
position for cutting;
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The wafer is then cut through its thickness according to the
programmed die dimensions using a resin-bonded diamond
wheel rotating at a very high rpm; and
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The wafer goes through a cleaning process using high
pressure DI water sprayed on the rotating work piece and
then dried by air-blowing.
DMT 243 – Chapter 3
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General Semiconductor Packaging Process Flow
Important Parameters
Important parameters for consideration during wafer saw
include the following:
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cut mode (direction and manner of cutting),
feed speed (speed at which the wafer is being introduced to the
blade), spindle rev (speed of revolution of the cutting wheel),
blade height, and
cutting water flow.
Important parameters for the washing step include the
following: wash time, wash rpm, DI water pressure, dry time,
dry rpm, temperature and air flowrate.
DMT 243 – Chapter 3
M.Nuzaihan
General Semiconductor Packaging Process Flow
Wafer Saw Failures
Lateral Crack on laminated wafer
Saw like chipping on bare die
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General Semiconductor Packaging Process Flow
Wafer Saw Failures
Crack at the side
DMT 243 – Chapter 3
Minor crack line
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General Semiconductor Packaging Process Flow
• After Semester Break
Wafer Backgrinding, Die Preparation, Die
Attach, Wire Bonding, Die Overcoat,
• Lab Session + Assignment 2
Molding, Sealing, Marking, DTFS, Lead
Finish, Electrical Testing, Tape & Reel, Dry
Packing, Boxing and Labeling.
• TEST 1 – 20/02/2008
Chapter 1 & Chapter 2 & Chapter 3
DMT 243 – Chapter 3
M.Nuzaihan