Transcript What is Wafer Fabrication?

WAFER FABRICATION
Lecture 1
Taklimat UniMAP
Introduction to Wafer Fabrication
Universiti Malaysia Perlis
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WAFER FABRICATION
HISTORY
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WAFER FABRICATION
What is Wafer Fabrication?
1. The technology to produce IC (Integrated Circuit)
microchips
2. IC chips are the backbone of the computer industry
and have spurred related technologies such as
software and internet
3. Every product of the information age is an offspring of
IC technology
4. IC chips increasingly control functions in cars, TVs,
VCRs, cameras, mobile phones, toys, etc.
5. The current technology is as a result of years of
research and development, taken many thousands of
scientists, engineers and technicians.
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WAFER FABRICATION
The Evolution of IC
1.1947 – First transistor, AT & T Bell Labs
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2.1952 – First Single Crystal Germanium
3.1954 – First Single Crystal Silicon
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4.1958 – First IC Device, TI
5.1961 – First IC product, Fairchild Camera
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Transistor and Its Inventors
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• Shockley left Bell Labs in 1956, to start his
own lab in San Francisco Bay, California.
Nowadays known as Silicon Valley. His lab
has attracted
talented scientist
such as
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Robert Noyce and Gordon Moore.
• Gordon Moore and Robert Noyce left
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Perlis
Shockley
in 1957 toMalaysia
start Fairchild
Semiconductor.
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IC Device by Jack Kilby, Texas
Instruments 1958
• 1st fabricated by Bell
Labs in 1958.
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• Jack Kilby demonstrated
functional IC, fabricated
on germanium strip
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consists
of;
• one transistor, one
capacitor and 3 resistors
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Silicon IC Chip by Robert Noyce,
Fairchild Camera, 1961
• Fairchild Semiconductor
produced the
1stcommercial ICs in
1961. This ICTaklimat
consists of UniMAP
only 4 transistors sold for
USD 150 a piece.
• NASA was the main
customer.
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• In 1968, Robert Noyce
co-founded Intel Corp.
with Andrew Groove and
Gordon Moore.
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Moore’s Law
•Intel co-founder Gorden
Moore notice in 1964 that
number of transistors
doubled ever 12 months
while price keeping
unchanged.
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•Slowed down in the
1980s to every 18
months
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•Amazingly still correct,
likely to keep until 2010
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WAFER FABRICATION
IC Integration Scale
Integration level
Abbreviation
Small scale Integration
SSI
No of devices
on a chip
2 to 50
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50 to 5k
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Medium scale integration
Large scale integration
LSI
5k to 100k
100k to 10M
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Very large scale integration
Ultra large scale integration
ULSI
10M to 1G
Super large scale integration
SLSI
Over 1G
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WAFER FABRICATION
CLEANROOM
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Cleanroom
• Definition of cleanroom: The cleanliness of
the air inside the room or area. The
number of particles,
humidity
and
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temperature is control according to the
standard.
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• Particles
kills yield Malaysia Perlis
• IC fabrication must be in a clean room
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ISO 14644-1 Clause 2.1.1
‘ A room in which the
concentration of airborne
particles is controlled, and
which is constructed and
used in aTaklimat
manner to UniMAP
minimize the introduction,
generation, and retention of
particles inside the room and
in which
other relevant
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parameters, eg temperature,
humidity and pressure are
controlled as necessary’
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Clean room
• First used for surgery room to avoid
bacteria contamination
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• Adopted in
semiconductor
industry in
1950
• Smaller device needs higher grade
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clean room
• Less particle, more expensive to build
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Clean room class
• Class 10 is defined as less than 10
particles with
diameter
larger
than
0.5
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m per cubic foot.
• Class 1 is defined as less than 1 such
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particles
per cubic
foot.
• 0.18 mm device require higher than
Class 1 grade clean room.
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WAFER FABRICATION
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WAFER FABRICATION
Definition of Airborne Particulate
Cleanliness Class per Fed. Std. 209E
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WAFER FABRICATION
Source of Contamination
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Sizing up the enemy
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Effect of Particles on Masks
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Effect of Particle
Contamination
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WAFER FABRICATION
Cleanroom structure
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CLEANROOM
TaklimatPROTOCOLS
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Cleanroom protocols
• Cleanroom protocol- A set of rules and procedures
that cleanroom workers must follow to maintain the
cleanliness of the cleanroom environment.
• All cleanroom workers must be trained and certified
when they start with, and at least once a year
thereafter.
• Bunny suits are required for all personnel in the
cleanroom at all the times. Bunny suits are effective
at containing contamination originating from
clothing.
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Purposes
• To ensure the cleanroom procedure is
implemented and practiced by all
personnel Taklimat
including visitors.
UniMAP
• To control and maintain the cleanliness
of the cleanroom.
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• To maintain
the good
quality of
products.
• To ensure the safety of personnel and
properties.
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Cleanroom Entry Items
• Garments and Booties
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1. Blue- Maintenance,
facility,
contractors
2. WhiteProcess, production,
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3. Green- visitors/vendors
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Garments Items
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Gowning Procedures- Pre
Entry
• Change street shoes to clean shoes
• Visitor mustTaklimat
wear shoeUniMAP
cover
• Enter fab building
• Remove
and
place
all
belongings
at
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designated cabinet
• Place clean shoes to shoe rack
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Gowning procedures- Changing room
1.
2.
3.
4.
Put on disposable hair cover.
Visitor need to wear disposable face mask first.
Put on hood and face mask.
Put on the Coverall (don’t allow coverall to touch
the floor).
5. Walk to gowning bench and wear high top booty.
6. Swing over to clean area after wearing booty at
one side.
7. Check in front of mirror.
8. Put on gloves. (Ensure that the glove tight under
your garment)
9. Walk along the tacky mat.
10. Enter main air shower (maximum 3 persons). Make
few rotation when air is blown. Wait until air blow
stops.
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De-gowning Procedure- Changing
Room
• Enter air shower (wait until back door closed)
• Remove gloves and throw into dustbin.
• Walk to gowning bench. Remove one of high top
booty.
• Swing over to pre-clean area and remove another
high top booty.
• Remove jumpsuit, hood, permanent face mask and
hair cover. Hang properly to garment cabinet.
• Visitor need to remove disposable face mask and
hair cover. Thrown into dustbin.
• Wear clean shoe.
• Visitor need to remove shoe cover at fab
entrance/linkway entrance.
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WAFER FABRICATION
Prohibited materials
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WAFER FABRICATION
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WAFER FABRICATION
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WAFER FABRICATION
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WAFER FABRICATION
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WAFER FABRICATION
YIELDUniMAP
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WAFER FABRICATION
Fab cost
• Fab cost is very high, >$1B for 8”
wafer size
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1. Cleanroom
2. Equipment; >$1M per tool
3. Materials;
high
purity,
ultra
high
purity
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4. Facilities
5. People, training and pay
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WAFER FABRICATION
Types of Yield
1. Wafer yield
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2. Die yield
3. Manufacturing yield
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WAFER FABRICATION
Wafer Yield
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• % of wafers arriving at test relative to no of
wafers started
Malaysia
• WafersUniversiti
No
of
wafers
at test
good
Perlis
• Waferstotal-No of wafers started
• Manufacturing responsibilities
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WAFER FABRICATION
Low Wafer Yield
•
•
•
Depends mainly on processing and wafer
handling.
Careless human handling and robot
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malfunction
or miscalibration
can break
the brittle silicon wafers.
Faulty processes such as misaligned
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photolithography
with etch
or ion
implantation, wrong dopant
concentration, poor uniformity, or large
amounts of particles on wafer can ruin
wafers.
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WAFER FABRICATION
Die Yield
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• % dies passing test relative to no of dies
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arriving
at test
• Diesgood- Die pass
• Diestotal- Die at test
• Process responsibilities
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WAFER FABRICATION
Low Die Yield
• Particle contamination, process
maintenance,
and total
process steps.
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WAFER FABRICATION
Packaging Yield
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WAFER FABRICATION
Low Packaging Yield
• Wire bonding quality.
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• Specification
difference
between the
die test and the chip final test
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WAFER FABRICATION
Overall Yield
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• Overall
Yield
determines
whether
a
fab
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is making profit or losing money
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WAFER FABRICATION
How does fab making money
• Cost:
?
1.
2.
3.
•
1.
2.
*
Wafer (8”): ~$150/wafer*
Processing: ~$200 ($1/wafer, 200 process step)
Packaging: ~$1/chip
Sale:
~100 chips/wafer
~$50/chip (low-end microprocessor in 2000)
Cost of wafer and price of chip are changing
daily, numbers are choosing randomly based on
general information
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WAFER FABRICATION
How does a fab make (loss) money ?
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WAFER FABRICATION
One lot of Flash Memory product which consists of thirty six (36) wafers is
released into the production line in wafer Foundry X.
•Each wafer consists of 10 000 dies.
(i)Given that Wafer Yield = 100%, Die Yield = 80% and Packaging Yield = 90%.
Calculate the overall yield for that particular lot.
(i)Based on the information in Table 1, calculate the Foundry’s X profit margin
for that particular lot if the Flash Memory is RM 2 per die.
Total process steps to produce a complete product are 300.
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Item
Cost
Pls. submit
your answer
during the
next class
session!!
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Starting wafer
RM 280 per wafer
Wafer processing*
RM 2 per wafer per process
step
Die packaging
RM 0.80 per die
Table 1: Wafer production cost
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