Transcript april2002
CARIOCA Status & Plans W. Riegler, April 2002 CARIOCA6 results (last submission) CARIOCA7 features (April 15th submission) CARIOCA8 plans (summer submission) Manpower, Schedule etc. CARIOCA6 Chip was submitted by Danielle in November, 8 channel chip, positive and negative version with BLR (‘final channel’). Received mid. February Test boards designed by Anatoli and Giacomo, fabricated by Roma. Basic functionality is there, 2 problems: Threshold Non-Uniformity of positive and negative chip Negative chip is too close to instability Threshold non-uniformity Threshold varies channel to channel by 17mV rms -> 3-4 fC rms (nominal threshold MWPC 10fC): too much !!! We were afraid of this effect due to DC coupling. The BLR chip fabricated for ATLAS MDTs in 1997 had exactly the same problem. Therefore a HSPICE MC was performed in November which showed a variation of 3mV rms. Effect is due to Threshold Voltage variations of the input transistors of the first BLR stage (small gm). For the CARIOCA 7 submission these transistors where changed and the HSPICE Monte Carlo shows a factor 10 less threshold spread compared to before. Instability of Negative Polarity Chip Before CARIOCA6 there was one 8-channel ‘preamp only’ prototype that was extensively tested in the LAB and on the chamber. It didn’t show instability, however it was noticed to be ‘more touchy’ than the positive amplifier. On the COARIOCA6 chip Single channels are nicely stable BUT consistently show a sensitivity of twice the design value. Connecting all channels to the detector (or only SPARK protection board) the chip starts oscillating. We have to review the negative preamp, there was not enough time to fix it for the April 15th submission. CARIOCA3 Negative Preamp CARIOCA negative polarity amplifier, beam 3.15kV (measured) Overall Plans Development started beginning of 2000 and the first 5 prototypes worked according to specifications. Comparing to other frontend developments for LHC the CARIOCA project is quite well on the way. However we have a very aggressive schedule. We wanted CARIOCA7 (April 15th submission) to be the final prototype. Now we want CARIOCA8 (this summer) to be the final prototype. Threshold variation is hopefully fixed. Stability will hopefully be fixed by summer. CARIOCA7 Chip was submitted by Nicolas April 15th, expected back July 1st. Two 8 channel positive polarity chips with different BLR input transistors (‘final channel’). Test Pulse injection system is added. Differential threshold circuitry is added. Biasing is final. One threshold for each channel to be sure we can use it on chambers for tests. If it works it is the final positive polarity prototype. CARIOCA8 Submission will be in July or August. To be solved: Instability of negative amplifier. Manpower (alphabetic order): Anatoli, Danielle, Francis, Nicolas, Pierre, (Student ?), Walter, Werner CARIOCA7 was just submitted, we are starting only now to think about the instability problem. Ideas: optimize the current design ‘small’ changes Is it possible to have one chip for positive an negative polarity (Anatoli proved on the chamber that it is possible) By the LHCb week we will report on this in detail. CARIOCA4 Preamp+Shaper Pulses Maybe we change the shaper time constants a little bit. CARIOCA positive polarity amplifier + shaper, Am241 2.9kV (measured) CARIOCA5 Tests CARIOCA5: preamp+shaper+discriminator on Chamber Am241 (measured) Conclusions We wanted CARIOCA7 (April 15th submission, arriving July 1st) to be the final prototype. Now we want CARIOCA8 (July or August submission, arriving October or November) to be the final prototype. Tests of CARIOCA6 on chamber will be done in May. Full chain test would already be possible with CARIOCA6.