Design and Frequency Scaling of CMOS VCO

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Transcript Design and Frequency Scaling of CMOS VCO

Frequency Scaling and
Topology Comparison of
Millimeter-wave VCOs
Keith Tang
Steven Leung
Nelson Tieu
Peter Schvan*
Sorin Voinigescu
University of Toronto, *NORTEL
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Outline
Motivation
VCO Design Methodology
Frequency Scaling
Measurement
Summary
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Motivation
MOSFET DC, HF and noise characteristics
are scalable across technology nodes
VCO topologies are very simple with one or
two transistor half-circuits
Algorithmic design and frequency scaling
methodologies can be developed even at
77GHz
→ Design productivity increases!
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Colpitts VCO – Design
1. Choose LTANK (smallest for
low phase noise)
2. Calculate Ceq from operating
frequency
3. Bias transistors at optimum
noise current density (0.15
mA/mm)
4. Size transistors to provide
enough negative resistance
5. Choose LS large (AC open)
6. Add RSS, CSS and LSS for bias
and noise de-coupling
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Cross-coupled VCO – Design
1. Choose LTANK
2. Bias transistors at
optimum noise current
density (0.15 mA/mm)
3. Size transistors to
provide enough
negative resistance
4. Calculate CVAR from
operating frequency
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Frequency Scaling
LTANK/k
f OSC 
C1/k
1
LC
k fOSC
CVAR/k
Same applies to cross-coupled VCO
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VCO Test Structures
fOSC
VCO
8drops by 20%
2in 180-nm 1.6
due to lack of parasitic extraction tools
Colpitts
90-nm
90-nm
180-nm 180-nm 90-nm
90-nm
VCO
10 GHz 77 GHz 20 GHz
40 GHz
50 GHz 80 GHz
LTANK [pH]
435
50
200
100
100
60
C1 [fF]
800
100
100
50
50
35
CVAR [fF]
800
100
100
50
50
35
Wf [um]
1
1
2
2
2
2
Nf
100
60
40
20
20
16
Nf does not scale with L and C at very high frequency
because of parasitic gate and source resistances
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VCO Test Structures (2)
Cross-coupled 90-nm
VCO
90-nm
180-nm
10 GHz 12 GHz 17 GHz
LTANK [pH]
435
273
70
CVAR [fF]
260
260
70
Wf [um]
1
1
2
Nf
24
24
40
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10-GHz Colpitts VCO
Tuning range:
9.2 – 10.4 GHz (11.8%)
Record phase noise:
-117.5 dBc/Hz @ 1 MHz (100 avg.)
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77-GHz Colpitts VCO
Record tuning range:
73.8 – 80.0 GHz (8.3%)
Record phase noise:
-100.3 dBc/Hz @ 1 MHz (100 avg.)
20log(8) ≈ 17dB higher than
10-GHz VCO’s phase noise!
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10-GHz Cross-coupled VCO
Tuning range:
9.3 – 10.9 GHz (15.8%)
Phase noise:
-109.2 dBc/Hz @ 1 MHz (100 avg.)
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77-GHz CMOS
Cross-coupled VCOs
First VCO with p-MOSFET
at 77 GHz
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Die Photos
77 GHz Colpitts VCO:
77 GHz Cross-coupled
VCO:
0.40mm
0.16mm
0.08mm
0.27mm
0.22mm
0.42mm
0.22mm
0.37mm
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Topology Comparison
At low
veryfrequency:
high frequency…
Topology
Colpitts Cross-coupled
Power consumption
․
√
Tuning range
√
X
√
Output power
√√
․
X
Phase noise
√√
․
X
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VCO Figure of Merit
Figure of Merit for VCO defined in ITRS 2003:
2
 f OSC 
1

FoM 1  
 f  L[f ]PDISS
But, output power is important for mixer, PA…
2
POUT
 f OSC 

FoM 2  
 f  L[f ]PDISS
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FoMs Comparison
With FoM2, SiGe HBT VCOs show better performance
than CMOS VCOs at mm-wave frequencies
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Summary
VCOs with record-breaking performances
achieved by algorithmic design at 10 and 77 GHz
Frequency scaling of Colpitts VCOs from 10 to 77
GHz in 90-nm CMOS, 20 to 40 GHz in 180-nm
CMOS demonstrated
First cross-coupled VCO with p-MOSFET at
77 GHz
Colpitts topology exhibits better performances
than cross-coupled topology at mm-wave
frequencies
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Acknowledgement
NORTEL and CMC for fabrication
CMC for CAD tools
CFI and OIT for test equipment
Dr. M. T. Yang for support
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Loss at Very High Frequency
Considering the transistor’s resistance:
1
f
1
RG , RS 
 RG , RS  f
Nf
C1 , N f 
RG, RS increase with frequency and both lumped to RTANK
-
Larger transistor size required at very high frequencies
It is critical to keep the VCO layout identical:
-
Transistor layout
Component orientation
Interconnect routing
such that layout parasitics also scale
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Ref
*
Process
90-nm CMOS:
Colpitts
fosc
Tuning
Phase Noise
Pout
Pdiss
FoM1
FoM2
[GHz]
[%]
[dBc/Hz]
[dBm]
[mW]
[dB]
[dB]
10
12.2
-117.5@1MHz
4.0
36
181.9
185.9
77
8.1
-100.3@1MHz
-13.8
37.5
182.3
168.5
*
NMOS cross-coupled
10
15.8
-109.2@1MHz
-2.2
7.5
180.4
178.2
*
CMOS cross-coupled
77
2.6
-84.3@10MHz
-13.2
13.5
150.7
137.5
[1]
90-nm CMOS
60
0.17
-100@1MHz
-23.2
1.9
192.8
169.6
*[6]
SiGe HBT, fT = 170GHz
96
4.6
-101.6@1MHz
0.7
133
180.0
180.7
SiGe HBT, fT = 230GHz
105
4.4
-101.3@1MHz
2.7
133
180.3
183.0
SiGe HBT, fT = 175GHz
77
8.7
-97@1MHz
18.5
1200
163.9
183.0
100
6.2
-90@1MHz
14.3
1200
159.2
173.5
[7]
[8]
SiGe HBT, fT = 200GHz
75
6.1
-105@1MHz
3.5
72
183.9
187.4
[9]
SiGe HBT, fT = 200GHz
98
3.3
-85@1MHz
-6
60
167.0
161.0
[10]
SiGe HBT, fT = 200GHz
85
2.7
-94@1MHz
-8
25
178.6
170.6
[11]
InP HBT, fT = 75GHz
108
2.6
-88@1MHz
0.92
204
165.6
166.5
[12]
130nm CMOS
90
2.4
-105@10MHz
-16
15.5
172.2
156.2
[13]
130nm CMOS
114
2.1
-107.6@10MHz
-22.5
8.4
179.5
157.0
* our work
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