Transcript Course Description

ELEC516
VLSI System Design and Design
Automation
Spring 2010
Course Description
Chi-ying Tsui
Department of Electrical and Electronic Engineering
HKUST
[email protected]
Rm: 2522
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Outline
 About this class
 Course Description
 About the instructor
 Course Content: Lectures, Labs and Textbook
 Course Grading
 Web site: URL: http://www.ee.ust.hk/~elec516
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About the class
 Prerequisite: ELEC152, ELEC301,
– Basic knowledge on Digital design, and CMOS VLSI
Design
 Teaching Team
– Instructor: Prof. Chi-Ying Tsui X7071, Rm. 2520
• Email: [email protected]
– TA: Qian ZhiLiang X8844, Rm. 3114,
[email protected]
 Class time: Tuesday 3:00 p.m. to 5:50 p.m.
 Office Hour: Tuesday 1:00 p.m. to 3:00 p.m.
– Lab: Free access all time to room 3114(A).
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Background of the course
 In ELEC301 we have learned:
– The basics of VLSI design,
– Analysis of digital circuits (Static and dynamic
performance)
– How to optimize the performance of simple and complex
gates
 As the technology is scaling down, more and more devices are
being implemented on a single chip leading to:
– More complex systems on a chip
– Challenging design task as millions/billions of
transistors are integrated.
 Design automation and new design methodologies are
therefore required to assist the Engineers in complex tasks
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Course Description
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 ELEC516 is dedicated for advanced Digital VLSI design technique
for high performance and low power.
– Design complex system such as System-on-chip (SOC)
design flow
 Design methodology such as top-down synthesis approach,
design for testing will be discussed.
 Design of digital arithmetic blocks will be covered.
 Other building blocks, such as memory will covered
 Other design issues such as clocking, interconnect, power
delivery, testing will also be covered
 Low Power Design techniques will be covered
 Specialized Application specific VLSI Architectures will be
discussed if time permits.
 Extensive use of CAD tools and HDL modeling - Synopsys and
Cadence Tools
 Design project
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Philosophy
 Beside the theoretical aspect of the course, it is a very
practical one which would give you a first hand experience
on advanced digital design techniques.
 Lectures will allow you to understand all the design aspects
and analysis of complex digital CMOS circuits.
 Tutorials will cover VHDL, use of CAD Tools and Design Flow
 Projects and HW will cover practical aspects of the course by
designing circuits for real-life applications.
 Even though detailed lectures are provided, you are
encouraged to go through the textbook.
 Lectures will cover the most important aspects, show
different approaches and methodologies of CMOS design.
 Projects in Cadence and Synopsys (Industry standard
software).
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Philosophy
 The goal is that everybody learns “something” and would
be able to design, complex digital system using automated
tools. The goal is also to learn advanced design techniques
for digital systems.
 “Something” also depends on your motivations and
interest.
 Open door policy is provided by the instructor: Don’t
hesitate to ask questions and to consult with the instructor
during the provided consultation hours
 If you don’t understand any point don’t hesitate to ask and
do not leave it until it’s too late.
 Do not hesitate to discuss your difficulties with the
instructor.
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About the Instructor
Instructor: Dr. Chi Ying Tsui,
Office: EEE, Room 2520
Phone: 2358.7071,
Email: [email protected]
 Master and PhD in Computer Engineering from University
of Southern California, USA.
 ECAD algorithm design and VLSI Design Flow
 Low Power and High performance VLSI implementation of
digital systems such as wireless system baseband and
multimedia applications.
 VLSI design of Power Management System for portable
applications
 Network-on-chip implementation.
 Embedded System design for multimedia applications
 Energy Harvesting Systems
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Text and Reference Books
 Major Text:
– J. Rabaey,A. Chardrakasan, B. Nikolic, “Digital Integrated
Circuits - A Design Perspective”, 2nd Edition, Prentice Hall
– "VHDL: Analysis and Modeling of Digital Systems", by
Zainalabedin Navabi, 2nd Edition
 Major Reference:
– Weste and Eshraghian “Principles of CMOS VLSI Design - A
System Approach” Third Edition
– Wayne Wolf, “Modern VLSI Design, System-on-chip Design”,
third edition
– "Synthesis and Optimization of Digital Circuits", by Giovanni
De Micheli
– "A Designer's Guide to VHDL Synthesis" by Douglas E. Ott
and Thomas J. Wilderotter
– Synopsys Manual
– Cadence Design Systems documentation
– Research papers
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Lecture Outlines
-Addition tutorial on VHDL and synthesis on the second to the fifth week.
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Assignments
 3-4 Assignments
 1st and 2nd on VHDL and synthesis flow
– Objective – to get familiar with VHDL and the tools
 3rd and 4th Assignments – problem solving
questions
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Course Grading
 Examinations : 60%
– Mid-term Examination:20%
– Final Examination: 40%
 Assignment: 15%
– There are two types of homeworks
• Lab type of homework - you have to use CAD tools to do the
homework, you have to hand in specific reports for these type of
homework. For some homework, you may need to arrange a time
demonstrate your result to the TA.
• Written homework – problem solving homework
 Course projects : (25%)
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Design Project
 Group project: Personal per group ~ 2
– Team work is important
 Designing a chip from specification down to layout
 Tasks to be finished
– Specification:High-level model
– Logic Design: Synthesis and simulation
– Layout Design of critical block
– Verification - simulation for different abstraction level
– Final Layout of the chip
– Performance estimation of the chip
 Grading will be based on correctness, area, performance and power of the
design
 Project Title will be given at week 7.
 Project group formation by week 8.
 Project Demo and Design report –week 15
 Workload: The work of the project should be done jointly. You are responsible for
time arrangement, workload and distribution of the task. You are required to sign a
declaration indicating the relative amount of work (in %) each member of the group
has contributed.
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Assumed Background knowledge
 Basic CMOS circuit theory and design technique
– resistance, capacitance, inductance
– MOS gate characteristics
– Different CMOS logic design technique
– Basic performance evaluation
 Use of modern EDA tools
– simulation, validation (HSPICE)
– schematic capture tools (Cadence)
 Logic design
– logical minimization, FSMs, component design
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