Transcript Low-power, Low-noise, Low -voltage Amplifier for Very Low

A CMOS Front-end Amplifier
Dedicated to Monitor Very Low
Amplitude Signals from
Implantable Sensors
ECEN 5007
Mixed Signal Circuit Design
Sandra Johnson
Paper Overview
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Ultra low amplitude signal measurement module for implantable sensors
Overcome dominant noise of differential amplifier input stage (1/f flicker
noise, thermal noise, DC offset)
CHopper Stabilization technique (CHS) based on amplitude modulation of
desired signal
System Diagram
Selective Amplifier
Rail-to-Rail OTA
supply=1.8V
Vsig
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2nd order Gm-C BPF
(fc tracks fchop)
Modulator
Modulator
Measurement Results
Signal Bandwidth
Chopper Frequency
DC Gain
< 4.5kHz
37.6kHz
51dB
LPF
Vout
Presentation Overview
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Describe CHopper Stabilization Technique
Review AM Basics
Ideal CHopper Amplifier Simulation Results
Modulator Block Simulation Results
Ideal CHopper Amp and Modulator Block
Simulation Results
• Conclusion
CHopper Stabilization Technique
• The signal is amplitude modulated at a minimum of 2 times its
frequency.
• Amplitude modulation translates the signal to a frequency above the
noise and the voltage offset of the preamp stage.
• The modulated signal is then input into a preamp where it is added
with the offset voltage and noise, and then amplified.
• The amplified output is amplitude modulated with the same carrier
signal as the original low power, low frequency signal.
• The second modulation stage demodulates the amplified neural signal
back to its baseband frequency, while modulating the noise and offset
voltage signals up to the carrier frequency.
• The combined signal is then passed through a low pass filter
eliminating the unwanted higher frequency components.
Amplitude Modulation Basics
c1(t)
X
VIN  Am cosm t
X
VIN
c2(t)
VMOD
VDEMOD
VOUT
c1(t)  c2 (t)  Ac cosc t
Am Ac
[cos( c   m )t  cos( c   m )t]
2

Am Ac 2
Am Ac 2
VDEMOD  VMOD  m2 (t) 
[cos  m (t)] 
[cos(2 c   m )t  cos(2 c   m )t]
2
4
Am Ac 2
VOUT 
[cos  m (t)]
2
VMOD  VIN  m1(t) 


2
Am Ac
2
Am Ac 2
2
Am Ac 2
4


fc  f m fc fc  fm

2 fc  fm 2 fc 2 fc  fm


 



CHopper Stabilization Technique
T
T
c2(t)
c1(t)
t
t
c1(t)
+
++
A(f)
X
VOS+VN
VA
1 2 3 4 5 6
1 2 3 4 5 6
VOUT
pre-amp
Modulation
VIN
VA
X
VIN
c2(t)
1 2 3 4 5 6
Noise & Offset
1 2 3 4 5 6
VOUT
2nd Modulation
(Demodulation)
1 2 3 4 5 6
1 2 3 4 5 6
Ideal CHopper Amplifier - Block Diagram
Ideal CHopper Amplifier - Sim Results
For simplicity, Vsig is chosen to be a
sinewave of 4.5kHz, with maximum
amplitude of 100uV
The signal is fed into the multiplier
where it is multiplied by the carrier,
a 37.6kHz squarewave having an
amplitude of 1V. Vsig is effectively
modulated and appears at the odd
harmonics of the carrier. Its now split
into two 50uV signals at approx
33kHz (fc-fm) and 42kHz (fc+fm)
The noise is represented as a sum of
many sinewaves at amplitudes and
frequencies similar to those found in
the offset, flicker and thermal noise
of the amplifier.
The noise and the amplitude modulated
signal are added. Notice, in the time
domain, how Vsig rides on top of the
noise when it is modulated.
Ideal CHopper Amplifier - Sim Results
The amplifier has a gain of 100.
The modulated sidebands have an
amplitude of 5mV (0.5*Am*Ac,
where Ac=1V)
The modulated signal is passed
through a BPF, where the low
frequency noise is eliminated.
The signal passes through the second
multiplier block and is multiplied with
the same carrier. The results show a
signal at 4.5kHz (the original Vsig
frequency) at an amplitude of approx
5mV (0.5*Am * Ac2), and two signals
with approx amplitudes of 2.5mV at
frequencies 70.7kHz and 79.7kHz
(2*fc-fm, 2*fc+fm)
Finally the signal is passed through a
LPF resulting in an amplified version
of Vsig.
Modulation/Demodulation Block
F
M1
VSI
G
~
F
M3
M4
M2
F
F
VOUT
• All switches are n-type devices
• Fis a square wave whose voltage is high enough
to drive the transistors into triode, and whose
frequency is at least twice that of VSIG
• When Fis high;
M1/M2 are ON, M3/M4 are OFF,
VOUT = VSIG
• When F is low;
M1/M2 are OFF, M3/M4 are ON,
VOUT = -VSIG
• VOUT is an amplitude modulated signal located at the
odd harmonics of the carrier frequency
Modulator/Demodulator Block - Sim Results
(clock feedthrough)
CL= 0pF
CL= 10pF
CL= 100pF
CL= 1000pF
Vsig affected by clock feedthrough of
modulator. Very "noisy" in the frequency
domain. Used CL=1nF to achieve the
above signal. Will need additional options
(dummy switches, etc) to combat
clock feedthrough.
Ideal CHopper Amplifier with Modulator Block Diagram
Ideal CHopper Amplifier with Modulator Sim Results
Vsig is chosen to be a sinewave of
4.5kHz, with maximum amplitude
of 100uV
The signal is fed into the modulator
circuit, where it modulates the
amplitude of the 37.6kHz carrier
signal. It's now split into two 50uV
signals at approx 33kHz (fc-fm) and
42kHz (fc+fm)
The noise is represented as a sum of
many sinewaves at amplitudes and
frequencies similar to those found in
the offset, flicker and thermal noise
of the amplifier.
The noise and the amplitude
modulated signal are added. Notice,
in the time domain, how Vsig rides
on top of the noise when it is
modulated.
Ideal CHopper Amplifier with Modulator Sim Results
The amplifier has a gain of 100.
The modulated sidebands have an
amplitude of 5mV (0.5*Am*Ac,
where Ac=1V)
The modulated signal is passed
through a BPF, where the low
frequency noise is eliminated.
The signal passes through the second
modulator circuit where its amplitude
modulates the second carrier signal of
37.6kHz. The results show a
signal at 4.5kHz (the original Vsig
frequency) at an amplitude of approx
5mV (0.5*Am * Ac2), and two signals
with approx amplitudes of 2.5mV at
frequencies 70.7kHz and 79.7kHz
(2*fc-fm, 2*fc+fm)
Finally the signal is passed through a
LPF resulting in an amplified version
of Vsig.
Conclusion
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Paper results
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Chip fabricated in 0.35u technology by CMC
Layout core area size 0.52mm2
CHopper frequency and BPF corner frequency ~37kHz
BPF quality factor, specified at 4, allows for a signal bandwidth of up to 4.5kHz
Power Consumption 775uW
DC gain 51dB
CHopper amplifier is able to overcome dominant noise source of the
differential input stage, for low frequency, ultra low amplitude signals
Simulating the ideal CHopper amplifier with modulator circuit block, a voltage
gain of 50 times the input voltage (~34dB) was realized using an ideal pre-amp
with 20dB gain and an ideal BPF (no gain).
Issues
– Clock feedthrough
– Accuracy of FFT function for frequency domain results
– Accuracy of ideal filter blocks