Transcript msCAN

msCAN
Controller Area Network
HCS12 Technical Training
Module 12- MSCAN, Slide 1
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
ATD
1
ATD
0
12K
SRAM
256K
FLASEEPROM
SCI
1
SCI
1
Internal Bus
SPI 2 SPI 1
or
or
PWM
PWM PWM SPI 0
8
CH CH
CHAN
4-7
0-3
msCAN
4
or
IIC
msCAN
3
msCAN
2
BKP INT
HCS12 CPU
msCAN
1
BDLC
or
msCAN
0
MMI
SIM
CM BDM
MEBI
PIM PLL
PIT
4K
BYTES
EEPROM
ECT
8
CHAN
msCAN Bus
Features:
Up to 5 msCAN Modules (msCAN)
• 3 Tx message buffers each Automatically Mapped
• 5 Background Rx Buffers
• Programmable I/O modes
• Maskable interrupts
• Programmable loop-back for self test operation
• Independent of the transmission medium (external
transceiver is assumed)
• Open network architecture
• Multimaster concept
• High immunity to EMI
• Short latency time for high-priority messages
• Low power sleep mode, with programmable wake
up on bus activity
Note: msCAN 0 is multiplexed with BDLC
msCAN 4 is multiplexed with IIC.
HCS12 Technical Training
Module 12- MSCAN, Slide 3
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
CAN SPECIFICATION
• LATEST REVISION (version 2.0) DIVIDED INTO PARTS A & B
-
PART A CONSISTS OF THE PREVIOUS SPECIFICATION REVISION (1.2):
- Standard 11-bit Identifier Field
- No specification for message filtering
- Layered architecture description based on Bosch's
internal model
-
PART B OUTLINES ENHANCEMENTS TO THE CAN PROTOCOL, INCLUDING:
- Extended 29-bit Identifier Field
- Some message filtering requirements
- Layer description based on ISO/OSI reference model
• MINIMUM CAN REQUIREMENTS INCLUDE COMPATIBILITY WITH
SPECIFICATION VERSION 2.0, PART A
• MOST CURRENT INDUSTRIAL APPLICATIONS USE THE STANDARD
(11-BIT) IDENTIFIER FORMAT
HCS12 Technical Training
Module 12- MSCAN, Slide 4
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
CAN PROPERTIES
• Serial communications protocol developed by Bosch,
initially for automotive multiplex wiring systems
• Message prioritization defined by the user
• Guaranteed minimum latency for highest priority
messages
• Multi - master protocol utilizes non - destructive
collision resolution to ensure the highest priority
message is transmitted onto bus
• Flexible system configuration allows the user to
create the network which best fits the application
• Error detection and error signaling features are
built into the CAN protocol, along with automatic
retransmission of corrupted messages
• Distinction between temporary errors and permanent
node failures prevents faulty nodes from causing
long-term disruptions of network traffic
HCS12 Technical Training
Module 12- MSCAN, Slide 5
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
msCAN - Layered Architecture
• DATA LINK LAYER
• LOGICAL LINK CONTROL (LLC) SUB-LAYER
- Acceptance Filtering
- Overload Notification
- Recovery Management
• MEDIUM ACCESS CONTROL (MAC) SUB-LAYER
-
Data Encapsulation/Decapsulation
Frame Coding (Bit Stuffing/Unstuffing)
Medium Access Management
Error Detection/Signaling
Acknowledgement
Serialization/Deserialization
• PHYSICAL LAYER
- Bit Encoding/Decoding
- Bit Timing
- Synchronization
HCS12 Technical Training
Module 12- MSCAN, Slide 6
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
msCAN Message Buffer Organization
Receiver
Rx0
RxBG
Rx1
msCAN
Rx2
RxBG - Receive Background Buffer
Rx3
Rx4
RxFG - Receive Foreground Buffer
RxFG
RxF
CPU
TxBG
TxE0
Tx0
TxBG - Transmit Background Buffer
TxFG - Transmit Foreground Buffer
Priority
Tx Buffer Pointer
Transmitter
TxFG
TxE1
Tx1
msCAN
Priority
TxBG
Note: All Tx Buffers map to same address
TxE2
Tx2
CPU
Priority
HCS12 Technical Training
Module 12- MSCAN, Slide 7
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
msCAN12 Buffer Scheme
msCAN Receive /
Transmit Engine
Tx Buffer 0
Priority Register
Internal
Priority
Scheduling
Tx Buffer 1
Priority Register
Identifier Filtering
Tx Buffer 2
Priority Register
2 x 32 bits
HCS12 Memory
Mapped I/O
or 4 x 16 bits
Rx Buffer
or 8 x 8 bits
Rx Buffer
* HCS12 FILTERING IS 2x THAT OF THE HC08
HCS12 Technical Training
Module 12- MSCAN, Slide 8
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
5X FIFO
Requirements of a CAN Controller
Microcontroller
•
Simple user interface to CPU
•
Message filtering and buffering
•
Protocol handling
•
Physical layer interface
CAN
Transmit
Receive
Engine
Message
filtering +
buffering
CPU
Interface
Control
+ status
CANH
CAN bus
CANL
Physical
interface
TX
R
X
H/W
Errors
HCS12 Technical Training
Module 12- MSCAN, Slide 9
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
Message Buffer Structure
EXTENDED
ID
$00x0
ID[28:18]
SRR IDE ID[17:15]
ID[14:0]
$00x2
RTR
$00x1
$00x3
$00x5
STANDARD
ID
$00x4
DATA BYTE 0
DATA BYTE 1
$00x6
DATA BYTE 2
DATA BYTE 3
$00x8
DATA BYTE 4
DATA BYTE 5
$00xA
DATA BYTE 6
DATA BYTE 7
$00xC
DLC[3:0]
$00xE
Time
$00x2
ID[10 :0]
$00x4
Tx Buffer Priority Reg.
CONTROL/STATUS
ID_HIGH
ID_LOW
$00x7
$00x9
$00xB
$00xD
$00xF
Stamp
RTR IDE 0 0 0
Reserved
$00x1
$00x3
HCS12 Technical Training
Module 12- MSCAN, Slide 10
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
Extended Format Frames
Field
Description
Time Stamp
Contains a copy of the high byte of the free running timer captured
at the beginning of the identifier field of the buffer frame on CAN bus.
ID[28:18]/[17:15]
Contains 14 MS Bits of Extended identifier.
Substitute Remote
Request (SRR)
Contains a fixed recessive bit, used only in extended format. It should
be set to ‘1’ for TX buffers. It will be stored as received in the RX buffers
ID Extended
(IDE)
Should be set to ‘1’ for extended formats, ‘0’ otherwise.
ID(14:0)
Bits[14:0] of the extended identifier field.
Remote Transmission
Request (RTR)
0 = Data frame,
1 = Remote frame
HCS12 Technical Training
Module 12- MSCAN, Slide 11
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
Standard Format Frames
Field
Description
Time Stamp
The ID LOW word, which is not needed for standard format, is used in
a standard format buffer to store the value of the free-running timer
which is captured at the beginning of the identifier field of the frame
on the CAN bus.
ID(28:18)
Contains bits (28:18) of the identifier, located in the ID HIGH word of
the message buffer. The four least significant bits in this register
(corresponding to the IDE bit and ID(17:15) for an extended identifier
message) must all be written as logic zeros to ensure proper operation
of the msCAN.
RTR
This bit is located in the ID HIGH word of the message buffer;
0 = data frame, 1 = remote frame.
RTR/SRR
Bit Treatment
If the msCAN transmits this bit as a one and receives it as a zero, an
“arbitration loss” is indicated. If the msCAN transmits this bit as a
zero and is receives it as a one, a bit error is indicated. If the msCAN
transmits a value and receives a matching response, a successful bit
transmission is indicated.
HCS12 Technical Training
Module 12- MSCAN, Slide 12
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
Frame Types
• A Data Frame is used to transmit data onto the
multiplex bus; this is the frame used most often in
a CAN network
• A Remote Frame is used to request a data frame from
another node on the multiplex bus
• An Error Frame will be transmitted by any node which
detects an error, corrupting the frame being
transmitted
• An Overload Frame is used by a node which desires
an extra delay between data or remote frames to
allow it time to prepare to transmit a frame
HCS12 Technical Training
Module 12- MSCAN, Slide 13
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
DATA FRAME
Interframe
Space
Interframe
Space
DATA FRAME
Start of Frame
(1 bit time)
Arbitration Field
(Standard ID - 12 bit times )
(Extended ID - 32 bit times)
Control Field
(6 bit times)
CRC Field
(16 bit times)
ACK Field
(2 bit times)
Data Field
(0-8 data bytes)
End of Frame
(7 bit times)
HCS12 Technical Training
Module 12- MSCAN, Slide 14
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
ARBITRATION FIELD
Interframe
Space
Start
of Frame
1 BIT
Control
Field
ARBITRATION FIELD
12 BITS FOR STANDARD ID
32 BITS FOR EXTENDED ID
Identifier
RTR Bit
Note: in devices compatible with CAN ver. 2.0, Part B, the
arbitration field may also contains the SRR and IDE bits,
in addition to the message identifier and RTR bit.
HCS12 Technical Training
Module 12- MSCAN, Slide 15
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
STANDARD Vs. EXTENDED I.D. FORMAT
STANDARD IDENTIFIER FORMAT
Interframe
Space
S
O
F
ARBITRATION FIELD
CONTROL
FIELD
Identifier (11 Bits)
r
0
RTR
Data
Field
DLC (4 Bits)
r1/IDE*
* In CAN 2.0, Part A - r1 bit
in CAN 2.0, Part B - IDE bit
EXTENDED IDENTIFIER FORMAT
Interframe
Space
CONTROL
FIELD
ARBITRATION FIELD
S
O
F
Identifier (11 Bits)
Identifier (18 bits)
SRR
IDE
r
1
r DLC (4 Bits)
0
RTR
HCS12 Technical Training
Module 12- MSCAN, Slide 16
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
Data
Field
CONTROL FIELD
Arbitration
Field
Data or CRC
Field
CONTROL FIELD
r1/IDE
r0
r0 - reserved, always
dominant
r1/IDE - r1 in Can 2.0,
Part A, r1/IDE
in Part B
DLC3
DLC2
DLC1
DLC0
Data Length Code
No. of
Data Length Code
data
bytes DLC3 DLC2 DLC1 DLC0
0
0
0
0
0
1
0
0
0
1
2
0
0
1
0
3
0
0
1
1
4
0
1
0
0
5
0
1
0
1
6
0
1
1
0
7
0
1
1
1
8
1
0
0
0
HCS12 Technical Training
Module 12- MSCAN, Slide 17
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
CRC & ACKNOWLEDGEMENT FIELDS
Data or
Control
Field
Ack
Field
CRC FIELD
CRC Sequence
(15 bit times)
CRC Delimiter
ACK Slot
ACK Delimiter
HCS12 Technical Training
Module 12- MSCAN, Slide 18
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End
of Frame
REMOTE FRAME
Interframe
Space
REMOTE FRAME
Interframe
Space
Start of Frame
(1 bit time)
Arbitration Field
(Standard ID - 12 bit times )
(Extended ID - 32 bit times)
Control Field
(6 bit times)
CRC Field
(16 bit times)
ACK Field
(2 bit times)
End of Frame
(7 bit times)
HCS12 Technical Training
Module 12- MSCAN, Slide 19
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
ERROR FRAME
Data
Frame
ERROR FRAME
Interframe Space or
Overload Frame
Error Flag
(6 bits)
superposition
of Error Flags
(12 bit times)
Error Delimiter
(8 bit times)
HCS12 Technical Training
Module 12- MSCAN, Slide 20
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
OVERLOAD FRAME
End of Frame or
Error Delimiter or
Overload Delimiter
OVERLOAD FRAME
Interframe Space or
Overload Frame
Overload
Flag
(6 bits)
superposition
of Overload Flags
(7 bit times)
Overload Delimiter
(8 bit times)
HCS12 Technical Training
Module 12- MSCAN, Slide 21
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
INTERFRAME SPACE
INTERFRAME SPACE - ERROR ACTIVE TRANSMITTER
Frame
Frame
INTERFRAME SPACE
Intermission
(3 bit times)
Bus Idle
INTERFRAME SPACE - ERROR PASSIVE TRANSMITTER
Frame
Frame
INTERFRAME SPACE
Intermission
(3 bit times)
Bus Idle
Suspend Transmission
(8 bit times)
HCS12 Technical Training
Module 12- MSCAN, Slide 22
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
MESSAGE ARBITRATION
• If multiple nodes transmit simultaneously, bit-wise
non-destructive arbitration during the message
identifier field resolves the conflict
• Identifier defines the priority of the message as well
as the target address
• Node transmitting a recessive level but detecting a
dominant level immediately halts transmission and
becomes a receiver
• Remote frame is lower priority than data frame
• Any loss of arbitration after the arbitration field
will be interpreted as an error, and an error frame
will be transmitted
HCS12 Technical Training
Module 12- MSCAN, Slide 23
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
ERROR DETECTION
• Multiple Error Detection Features:
- 15-bit cyclical redundancy check (CRC)
- Bit stuffing
- Each node verifies message framing
• All global errors detected
• Up to 5 randomly distributed errors will be detected
• Corrupted messages are flagged by any nodes
detecting the error
• Corrupted messages are automatically retransmitted
• Recovery time from error detection to start of
message retransmission is a maximum of 29 bit times
HCS12 Technical Training
Module 12- MSCAN, Slide 24
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
FAULT CONFINEMENT
• Separate error counters for transmit and receive errors
• Error counters incremented by 1 or 8, decremented by 1
• 3 possible bus states:
- Error active - both error counts < 128
- Error passive - either transmit or receive error count > 127
- Bus off - transmit error count > 255
• Once error-free bus traffic resumes, nodes can
recover from error states
HCS12 Technical Training
Module 12- MSCAN, Slide 25
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
ERROR SIGNALING
• Error Active Node
- Transmits active error flag during error frame
- Only waits for intermission period during inter-frame space
• Error Passive Node
- Transmits passive error flag during error frame
- Must wait for "suspend transmission" period as
well as intermission during inter-frame space
• Bus Off Node
- Output drivers switched off
- Will not participate in bus traffic, only allowed
to monitor bus
- Bus off node will return to error active status
following detection of 128 consecutive periods
of 11 recessive bits
HCS12 Technical Training
Module 12- MSCAN, Slide 26
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
Bit Timing
BIT TIME
SYNC_SEG
PROP_SEG
PHASE_SEG1
Transmit Point
PHASE_SEG2
Sample Point
•
SYNC_SEG : The bit edge is expected to lie within this segment ; always 1 time quantum (CAN clock period) long.
•
PROP_SEG : Allowance for physical delays. Programmable from 1 to 8 TQ long.
PROP_SEG >= 2 x  (bus propagation delay + input comparator delay + output driver delay)
•
PHASE_SEG (1, 2)
: Defines position of the Sample Point. May be adjusted to compensate for edge phase errors
–
PHASE_SEG1: Programmable from 1 to 8 time quanta long.
–
PHASE_SEG2: Is the greater of PHASE_SEG1 and the INFORMATION PROCESSING TIME.
•
SAMPLE POINT
: Bus value is taken as the value of the bit
•
INFORMATION PROCESSING TIME: Less than or equal to 2 time quanta.
•
BIT TIME
: Bit Time = SYNC_SEG + PROP_SEG + PHASE_SEG1 + PHASE_SEG2
HCS12 Technical Training
Module 12- MSCAN, Slide 27
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
msCAN Bus Timing (1 of 2)
CANBTR0 - Bus Timing Register 0
Address Offset
$0002
Synchronization Jump Width
Baud Rate Prescaler
HCS12 Technical Training
Module 12- MSCAN, Slide 28
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msCAN Bit Timing (2 of 2)
CANBTR1 - Bus Timing Register 1
Address Offset
$0002
SAMP: 1 or 3 samples per bit
TSEG1 is determined by TSEG13...TSEG10
TSEG2 is determined by TSEG22...TSEG20
TSEG22
0
0
0
:
1
TSEG21
0
0
1
:
1
TSEG20
0
1
0
:
1
TSEG2
1 Tq
2 Tq
3 Tq
:
8 Tq
TSEG13
0
0
0
:
1
TSEG12
0
0
0
:
1
TSEG11
0
0
1
:
1
TSEG10
0
1
0
:
1
HCS12 Technical Training
Module 12- MSCAN, Slide 29
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
TSEG1
1 Tq
2 Tq
3 Tq
:
16 Tq
SYNCHRONIZATION
• HARD SYNCHRONIZATION
- Occurs when recessive to dominant edge occurs during bus idle
- Internal bit time is started with Sync-Seg
• Resynchronization
- Occurs on all other recessive to dominant edges (and optionally
dominant to recessive edges)
- Phase-Seg 1 is lengthened or Phase-Seg 2 is shortened depending upon
phase error
• Phase Error - e
- e = 0 If edge lies within Sync-Seg
- e > 0 If edge lies after Sync-Seg
- e < 0 If edge lies before Sync-Seg
• Resynchronization Jump Width
- The maximum amount by which Phase-Seg 1 may be lengthened or
Phase-Seg 2 may be shortened
HCS12 Technical Training
Module 12- MSCAN, Slide 30
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
Resynchronization (2)
r
CAN
Bus
d
Receiver S PS P1 P2 S PS P1 P2 S PS P1 P2 S PS
bit timing
P1
P2
S PS
P1
P2
Sample points
Negative Phase Error
PHASE_SEG2 shortened
Positive Phase Error
PHASE_SEG1 lengthened
HCS12 Technical Training
Module 12- MSCAN, Slide 31
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
CAN
PHYSICAL LAYER REQUIREMENTS
• CAN Protocol does not specify physical layer
• No specified transceiver, user's network characteristics define
transceiver requirements
• Acceptable physical media can include, though not limited to:
-
Twisted Pair, Shielded or Unshielded
Single Wire
Fiber Optic Cable
Transformer Coupled to power lines
• Acceptable transmission rates range from 5k to1m bit/sec
• Most implementations use NRZ bit formatting over twisted pair bus
• Three different automotive physical layers exist:
ISO11898 Differential, ISOxxxx Fault-Tolerant, J2411 Single Wire
HCS12 Technical Training
Module 12- MSCAN, Slide 32
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msCAN MB Identifier Registers
bit 7
bit 6
bit 5
IDR0
ID28
ID27
IDR1
ID20
ID19
ID18
IDR2
ID14
ID13
IDR3
ID6
ID5
bit4
ID26
ID25
bit 3
bit 2
bit 1
ID22
bit 0
ID24
ID23
ID21
RTR/SRR
IDE
ID17
ID16
ID15
ID12
ID11
ID10
ID9
ID8
ID7
ID4
ID3
ID2
ID1
ID0
RTR
Address Offset
$00x0
$00x1
$00x2
$00x3
Standard Identifier (IDE = 0) / Base Identifier (IDE = 1)
Extended Identifier (SRR = 1)
The priority of an Identifier is highest for the smallest binary value
ie. logic ‘0’ is transmitted as dominant.
The 7 most significant bits (ID28 - ID22) must not all be ‘1’ (recessive).
HCS12 Technical Training
Module 12- MSCAN, Slide 33
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msCAN MB Data Registers
bit 7
DR0..7
D7
bit 6
bit 5
bit4
bit 3
D6
D5
D4
D3
DLR
DLC3
bit 2
D2
DLC2
bit 1
D1
DLC1
bit 0
D0
DLC0
Data Length Code should be 0..8 only.
TBPR
P7
P6
P5
P4
P3
P2
P1
P0
Priority Register for Transmit Buffers only. $00 is highest priority.
HCS12 Technical Training
Module 12- MSCAN, Slide 34
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msCAN Acceptance Registers (2x32 Bit Filter)
bit 7
bit 6
AC28
AC27
CANIDAR1
AC20
AC19
AC18 RTR/SRR
CANIDAR2
AC14
AC13
AC12
CANIDAR3
AC6
AC5
CANIDAR4
AC28
AC27
CANIDAR5
AC20
AC19
AC18 RTR/SRR
CANIDAR6
AC14
AC13
AC12
CANIDAR7
AC6
AC5
AC4
CANIDAR0
bit 5
bit 1
bit 0
AC23
AC22
AC21
IDE
AC17
AC16
AC15
AC11
AC10
AC9
AC8
AC7
AC4
AC3
AC2
AC1
AC0
RTR
AC26
AC25
AC24
AC23
AC22
AC21
IDE
AC17
AC16
AC15
AC11
AC10
AC9
AC8
AC7
AC3
AC2
AC1
AC0
RTR
AC26
bit4
bit 3
bit 2
AC25
AC24
Address Offset
$0010
$0011
$0012
$0013
$0018
$0019
$001A
Standard Identifier / Base Identifier
Extended Identifier
HCS12 Technical Training
Module 12- MSCAN, Slide 35
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$001B
msCAN Message Acceptance Mask
bit 7
bit 6
bit 5
bit4
CANIDMAR0
AM28 AM27
CANIDMAR1
AM20 AM19
AM18
RTR/SRR
CANIDMAR2
AM14 AM13
AM12
AM11
AM26
bit 3
AM25 AM24
bit 2
bit 1
AM23 AM22
bit 0
AM21
IDE
AM17
AM16
AM15
AM10
AM9
AM8
AM7
Address Offset
$0014
$0015
$0016
$0017
CANIDMAR3
AM6
AM5
AM4
AM3
AM2
AM1
AM0
RTR
$001C
CANIDMAR4
AM28 AM27
AM26
AM25 AM24
AM23 AM22
AM21
$001D
CANIDMAR5
CANIDMAR6
AM20 AM19
AM18
RTR/SRR
IDE
AM17
AM16
AM15
$001E
AM14 AM13
AM12
AM11
AM10
AM9
AM8
AM7
$001F
CANIDMAR7
AM6
AM5
AM4
AM3
AM2
AM1
Standard Identifier / Base Identifier
AM0
RTR
Extended Identifier
HCS12 Technical Training
Module 12- MSCAN, Slide 36
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
msCAN Message Acceptance Registers (4x16 bit filter)
bit 7
bit 6
bit 5
CANIDMAR0
AM28 AM27
CANIDMAR1
AM20 AM19
AM18
CANIDMAR2
AM28 AM27
AM26
CANIDMAR3
AM20 AM19
AM18
AM26
bit4
bit 3
AM25 AM24
RTR/SRR
IDE
AM25 AM24
RTR/SRR
IDE
bit 2
bit 1
bit 0
AM23 AM22
AM21
Address Offset
$0010
AM16
AM15
$0011
AM23 AM22
AM21
AM17
AM15
AM17
AM16
$0012
$0013
$0018
CANIDMAR4
AM28 AM27
CANIDMAR5
AM20 AM19
CANIDMAR6
AM28 AM27
CANIDMAR7
AM20 AM19
AM26
AM18
AM26
AM18
Standard Identifier / Base Identifier
AM25 AM24
RTR/SRR
IDE
AM25 AM24
RTR/SRR
IDE
AM23
AM22
AM21
AM17
AM16
AM15
AM23 AM22
AM21
AM17
AM15
AM16
Extended Identifier
HCS12 Technical Training
Module 12- MSCAN, Slide 37
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
$0019
$001A
$001B
msCAN Acceptance Registers (8x8 Bit Filter)
bit 7
bit 6
bit 5
bit4
bit 3
bit 2
bit 1
bit 0
Address Offset
$0010
CANIDMAR0
AM28 AM27
CANIDMAR1
AM28 AM27
AM26
AM25
AM24
AM23
AM22
AM21
$0011
CANIDMAR2
AM28 AM27
AM26
AM25
AM24
AM23
AM22
AM21
$0012
CANIDMAR3
AM28
AM26
AM24
AM23
AM22
AM21
AM27
AM26
AM25 AM24
AM25
AM23 AM22
AM21
$0013
$0018
CANIDMAR4
AM28 AM27
AM26
AM25 AM24
AM24
AM23
AM22
AM21
AM24
AM23
AM22
AM21
AM23
AM22
AM21
CANIDMAR5
AM28 AM27
AM26
AM25
CANIDMAR6
AM28 AM27
AM26
AM25
CANIDMAR7
AM28
AM27
AM26
AM25
AM23 AM22
AM21
$0019
AM24
Standard/Extended Identifier
HCS12 Technical Training
Module 12- MSCAN, Slide 38
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
$001A
$001B
msCAN Acceptance Filter
•
Each Acceptance Register has a corresponding Acceptance Mask Register.
•
Any bit set in an Acceptance Mask Register means that bit in the Acceptance Register is
masked, ie. not compared with the Message Identifier to determine acceptance.
•
Only bits in the Acceptance Register which are not masked are compared with the message
Identifier to determine acceptance.
–
–
16 bit filter. Bit 3 of CANIDAR1 is ‘1’ and bit 3 of CANIDMR1 is ‘0’
»
Therefore IDE must be ‘1’ to be accepted ie Standard Format Identifier.
»
In this case CIDMR1 bits 2,1,0 must all be ‘1’ (mask).
As above, plus CANIDMR1 bit 4 is ‘1’ (mask).
»
Therefore Data Frames or Remote Frames accepted.
HCS12 Technical Training
Module 12- MSCAN, Slide 39
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
msCAN Acceptance Control Register
bit 7
CANIIDAC
bit 6
bit 5
IDAM1
bit4
bit 3
IDAM0
bit 2
bit 1
bit 0
IDHIT2
IDHIT1
IDHIT0
Identifier Acceptance Mode Settings
Identifier Acceptance Hit Indication
HCS12 Technical Training
Module 12- MSCAN, Slide 40
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
msCAN Receive Process
1) Set SFTRST.
2) Configure Acceptance Filter.
3) Enable Receive interrupt.
4) Clear SFTRST.
Receive Interrupt:
1) Read Identifier.
2) Read Data Field (if not Remote Frame).
3) Read Timer Stamp if enabled.
4) Release Receive buffer.
HCS12 Technical Training
Module 12- MSCAN, Slide 41
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
msCAN Transmit Control
bit 7
bit 6
bit 5
bit4
bit 3
CANTFLG
RST:
bit 2
bit 1
bit 0
TXE2
TXE1
TXE0
0…………………………………………………………0
1
1
Address Offset
$0006
1
$0007
TXEIE2
CANTIER
RST:
ABTRQ2 ABTRQ1 ABTRQ0
$0008
0…………………………………………………………………………………...…………………0
CANTAAK
RST:
TXEIE0
0…………………………………………………………………………………...…………………0
CANTARQ
RST:
TXEIE1
ABTAK2 ABTAK1 ABTAK0
0…………………………………………………………………………………...…………………0
TXEn = 1: Transmit buffer empty (sent or aborted).
TXEn = 0: Transmit buffer full (not sent, scheduled).
TXEIEn = 1: Enable transmit interrupt.
ABTRQn = 1: Request abort of transmission.
ABTAKn = 1: Message aborted (not sent).
ABTAKn = 0: Message not aborted (sent).
Write “1” to Clear Interrupt Flag
HCS12 Technical Training
Module 12- MSCAN, Slide 42
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
$0009
msCAN Transmit Process
1) Write Identifier, Data and Priority to empty transmit buffer.
2) Schedule buffer for transmission (clear TXEn).
3) Enable Transmit interrupt (set TXEIEn).
•
The transmit buffer with the lowest value (highest Priority) that
is scheduled for transmission will arbitrate for CAN bus access
during the next IFS.
Transmit Interrupt:
1) Identify transmitted message buffer.
2) Disable Transmit interrupt.
3) Test ABTAK.
4) Read Time Stamp if enabled.
5) Load with new ID, data and schedule for transmission.
HCS12 Technical Training
Module 12- MSCAN, Slide 43
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
msCAN Interrupt Control
CANRFLG - Receiver Flag Register
•
WUPIF: Wakeup interrupt flag.
•
CSCIF: CAN Status Change Interrupt Flag
•
OVRIF: Overrun interrupt flag.
•
RXF: (Foreground) Receive buffer full.
RSTAT1–RSTAT0 — Receiver Status Bits
The values of the Error Counters control the actual bus status of the
MSCAN. As soon as the Status Change Interrupt Flag (CSCIF) is set
these bits indicate the appropriate receiver related bus status of the
MSCAN.
11 = Bus Off : 255 > Transmit Error Counter
10 = RxERR: 127 < Receive Error Counter
01 = RxWRN: 96 < Receive Error Counter < 127.
00 = RxOK: 0 < Receive Error Counter < 96.
TSTAT1–TSTAT0 — Transmitter Status Bits
The values of the Error Counters control the actual bus
status of the MSCAN. As soon as the Status Change
Interrupt Flag (CSCIF) is set these bits indicate the appropriate
transmitter related bus status of the MSCAN.
11 = Bus Off: 255 > Transmit Error Counter
10 = TxERR: 127 < Transmit Error Counter < 255
01 = TxWRN: 96 < Transmit Error Counter < 127
00 = TxOK: 0 < Transmit Error Counter < 96
To clear the interrupt request
Must write a “1” to clear
corresponding bit, with the event
that caused it to set is no longer valid
CACRIER - Receiver Interrupt Enable Register
HCS12 Technical Training
Module 12- MSCAN, Slide 44
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
msCAN Control Register 0
bit 7
CANCTL0 RXFRM
bit 6
RXACT
bit 5
bit4
CSWAI
SYNCH
bit 3
TIME
bit 2
WUPE
bit 1
SLPRQ
bit 0
Address Offset
$0000
INITRQ
RXFRM - Receive Frame
TIME - Timer Enable
1 = Internal timer enabled
0 = Internal timer is disabled
1= Valid message was received
0 = No message was received
WUPE - Wake-up Enable
1 = msCAN is able to start from sleep mode
0 = msCAN will not wake up from sleep mode and
ignores bus traffic
RXACT - Receiver Active
1 = msCAN is currently receiving a message
0 = msCAN is transmitting or idle
CSWAI - msCAN stops in WAIT mode
1 = msCAN clock is stopped during Wait mode
0 = msCAN continues to run in Wait mode
SYNCH - Synchronized Status
SLPRQ: SLEEP Mode Request.
1 = Put the msCAN to sleep
0 = msCAN functions normally
INITRQ - Initialization Mode Request
1 = msCAN is in initialization mode
0 = Normal operation
1 = msCAN is synchronized to CAN bus
0 = msCAN is not synchronized
HCS12 Technical Training
Module 12- MSCAN, Slide 45
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
msCAN Control Register 1
bit 7
CANCTL1
CANE
bit 6
bit 5
CLKSRC LOOPB
bit4
bit 3
bit 2
bit 1
bit 0
LISTEN
0
WUPM
SLPAK
INITAK
WUMP - Wake-up Mode
CANE - msCAN Enable
1 = msCAN is enabled
0 = msCAN is disabled
1 = msCAN wakes up the CPU upon detection of a dominant
pulse that has a length of Twup while WUPE=1
CLKSRC - msCAN Clock Source
1 = The msCAN clock source from IP bus clock
0 = The msCAN clock source from the OSC-CLK
0 = msCAN wakes the CPU on recessive to dominant
edge on the CAN bus while WUPE =1
SLPAK - Sleep Mode Acknowledge
LOOPB: Internal loopback self test mode.
1 = Enable loop back mode
0 = Disable loop back mode
1 = The msCAN entered sleep mode
0 = msCAN is running
INITAK - Initialization Mode Acknowledge
1 = Initialization mode is active
LISTEN - Listen only Mode
Address Offset
$0001
0 = Normal operation
1 = Listen only mode is active
0 = Normal operation
HCS12 Technical Training
Module 12- MSCAN, Slide 46
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
msCAN Low Power Modes
STOP
Power Down
Sleep
Soft Reset
x
-
WAIT
RUN
CSWAI = 1
SLPAK = 1
SLPAK = 1
SFTRST = 1 SFTRST = 1
msCAN registers may still be accessed in SLEEP and Soft Reset modes.
msCAN will generate a Wakeup interrupt only if SLPAK = 1 and WUPIE = 1
The message which wakes up the msCAN will not be received.
HCS12 Technical Training
Module 12- MSCAN, Slide 47
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
msCAN Error Counter
Rx Error Counter
Address Offset
$000E
Tx Error Counter
$000F
Rx & Tx Error Counters are Read Only when in sleep mode (SLPRQ = 1 & SLPAK =1) or
in Initialization mode (INITRQ & INITAK)
HCS12 Technical Training
Module 12- MSCAN, Slide 48
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
Motorola’s System Focus
Mirror
Application Code
Lock
Lock
OSEK COM/NM
Task Task Task Task Task Task
E
D
A
B
C
F
OSEK OS
ECU 4
OSEK OS
e.g.
ignition
OSEK OS
ECU 2
ECU 3
Motorola Silicon
Gateway
Application
OSEK COM/NM
Drivers
ECU 1
OSEK COM/NM
OSEK-OS, -COM, -NM
Climate
Control
Light
Central Body
Control
Heating
Seat
Wiper
Heating
Roof
Interior
Light
Lock
Seat
Motorola Focus
Instrument
s
Functionality
Design Tools
Development Tools
OS Libraries
Window Lift
Heating
Heating
Universal Motor
Lock
CAN Engine Network (> 250kbps)
CAN Body Network (< =125kbps)
Sub Bus Network
(< 50kbps)
Lock
Universal Panel
Mirror
HCS12 Technical Training
Module 12- MSCAN, Slide 49
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
Example of CAN in a Door System
HCS12
Vbatt
MC7805
Vbatt
Status
In1-I/O
In2-I/O
Di21-I/O
5v
MC33186DW
X
Y
M
M
Mirror Position
Vbatt
CAN Bus
Status
In1-I/O
In2-I/O
Di21-I/O
CAN H
CAN L MC33388DW
EN
STB
NERR
T
R
X
X
MC33186DW
M
Mirror Fold
Vbatt
Status
In1-I/O
In2-I/O
Di21-I/O
MC33186DW
M
Door Lock
Vbatt
Status
In1-I/O
In2-I/O
Di21-I/O
MC33186DW
M
Vbatt
MC33288DH
Status
Window Lift
M
In1-I/O
In2-I/O
Di21-I/O
Discrete
Logic
MTB75N06HD
HCS12 Technical Training
Module 12- MSCAN, Slide 50
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.
MTB75N06HD
Example of CAN in ISU / Gateway Application
Lamps / Motors
ISU SYSTEM
Vbat
5V
12K
RAM
256K
FLASH
INPUT
CIRCUITRY
MC33287
SPI
I/O's
CAN H
PWM
CAN H
CAN L
MC33388
CAN
Flasher
MC33288
I/O's
L
I/O's
L
R
M
R
L
DIAGNOSTIC
Front/Rear
Wiper Drivers
MC33HBRIDGE
CAN
MC33388
CAN L
Serial relay
drivers
(MC33298)
SCI
MC9S12DP256
BODY CAN BUS
POWERTRAIN CAN BUS
20 - 30
INPUTS
MC7805
Courtesy
lamps
MC33286
M
L
Central locking
driver
MC33HBRIDGE
M
M
M
HCS12 Technical Training
Module 12- MSCAN, Slide 51
MOTOROLA and the Stylized M Logo are registered in the US Patent & Trademark Office. All other product or service names are the property of their respective owners. © Motorola, Inc. 2001.